5ASXMB5G4F40C5N
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Package / Case | 1517-BBGA, FCBGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~85°C TJ |
| Packaging | Tray |
| Series | Arria V SX |
| JESD-609 Code | e1 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Terminal Finish | TIN SILVER COPPER |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.1V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 5ASXMB5 |
| JESD-30 Code | S-PBGA-B1517 |
| Supply Voltage-Max (Vsup) | 1.13V |
| Supply Voltage-Min (Vsup) | 1.07V |
| Number of I/O | MCU - 208, FPGA - 540 |
| Speed | 800MHz |
| RAM Size | 64KB |
| Core Processor | Dual ARM® Cortex®-A9 MPCore™ with CoreSight™ |
| Peripherals | DMA, POR, WDT |
| Clock Frequency | 622MHz |
| Connectivity | EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG |
| Architecture | MCU, FPGA |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Primary Attributes | FPGA - 462K Logic Elements |
| Height Seated (Max) | 2.7mm |
| Length | 40mm |
| Width | 40mm |
| RoHS Status | RoHS Compliant |
This SoC is built on Dual ARM? Cortex?-A9 MPCore? with CoreSight? core processor(s).
A core processor Dual ARM? Cortex?-A9 MPCore? with CoreSight? is used to build this SoC.The manufacturer assigns this system on a chip with a 1517-BBGA, FCBGA package as per the manufacturer's specifications.The 64KB RAM implementation of this SoC chip ensures efficient performance for users.The internal architecture of this SoC design utilizes the MCU, FPGA technique.The system on a chip is part of the series Arria V SX.The average operating temps for this SoC meaning should be 0°C~85°C TJ.Taking note of the fact that this SoC security combines FPGA - 462K Logic Elements is important.There is a state-of-the-art Tray package that houses this SoC system on a chip.As a whole, this SoC part is comprised of MCU - 208, FPGA - 540 inputs and outputs.As a rule of thumb, it is advised to use a power supply with a value of 1.1V.The SoCs wireless is considered unreliable if the voltage exceeds 1.13V.As a minimum, the power supply of the SoC system on a chip needs to be 1.07V.The FIELD PROGRAMMABLE GATE ARRAY can be configured to meet different design requirements.It is possible to find system on chips that are similar in specs and purpose by searching for 5ASXMB5.There is 622MHz clock frequency that is used in this SoC.
Dual ARM? Cortex?-A9 MPCore? with CoreSight? processor.
64KB RAM.
Built on MCU, FPGA.
Clock Frequency: 622MHz
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