Parameters |
Mounting Type |
Surface Mount |
Package / Case |
56-TFSOP (0.240, 6.10mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74ABT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
56 |
Type |
D-Type |
Terminal Finish |
NICKEL PALLADIUM GOLD |
Subcategory |
FF/Latches |
Technology |
BICMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
0.5mm |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74ABT16821 |
JESD-30 Code |
R-PDSO-G56 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
2 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.5V |
Number of Ports |
2 |
Clock Frequency |
250MHz |
Family |
ABT |
Current - Quiescent (Iq) |
1mA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Output Polarity |
TRUE |
Max I(ol) |
0.064 A |
Number of Bits per Element |
10 |
Max Propagation Delay @ V, Max CL |
3.3ns @ 5V, 50pF |
Prop. Delay@Nom-Sup |
3.7 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Propagation Delay (tpd) |
3.7 ns |
Power Supply Current-Max (ICC) |
19mA |
Max Frequency@Nom-Sup |
160000000Hz |
Length |
14mm |
Width |
6.1mm |
RoHS Status |
ROHS3 Compliant |
74ABT16821ADGG,112 Overview
It is packaged in the way of 56-TFSOP (0.240, 6.10mm Width). As part of the package Tube, it is embedded. There is a Tri-State, Non-Invertedoutput configured with it. The trigger configured with it uses Positive Edge. Surface Mountis occupied by this electronic component. A voltage of 4.5V~5.5Vis required for its operation. Temperature is set to -40°C~85°C TA. The type of this D latch is D-Type. FPGAs belonging to the 74ABTseries contain this type of chip. There should be no greater frequency than 250MHzon its output. D latch consists of 2 elements. As a result, it consumes 1mA quiescent current. A total of 56 terminations have been made. This D latch belongs to the family of 74ABT16821. Power is provided by a 5V supply. Input capacitance of this device is 3pF farads. ABTis the family of this D flip flop. This part is included in FF/Latches. There is a 5.5Vmaximum supply voltage (Vsup). Normal operation requires a supply voltage (Vsup) above 4.5V. The D latch runs on a voltage of 5V volts. The flip flop contains 2ports.
74ABT16821ADGG,112 Features
Tube package
74ABT series
5V power supplies
74ABT16821ADGG,112 Applications
There are a lot of NXP USA Inc. 74ABT16821ADGG,112 Flip Flops applications.
- Data transfer
- High Performance Logic for test systems
- Count Modes
- Matched Rise and Fall
- Guaranteed simultaneous switching noise level
- Supports Live Insertion
- Memory
- Clock pulse
- Registers
- Buffer registers