74ABT16823ADGG,112
| Parameters | |
|---|---|
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 190MHz |
| Family | ABT |
| Current - Quiescent (Iq) | 1mA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.064 A |
| Number of Bits per Element | 9 |
| Max Propagation Delay @ V, Max CL | 3.2ns @ 5V, 50pF |
| Prop. Delay@Nom-Sup | 3.7 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 3.7 ns |
| Max Frequency@Nom-Sup | 140000000Hz |
| Length | 14mm |
| Width | 6.1mm |
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 56-TFSOP (0.240, 6.10mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ABT |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 56 |
| Type | D-Type |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Additional Feature | WITH CLEAR AND CLOCK ENABLE |
| Subcategory | FF/Latches |
| Technology | BICMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Base Part Number | 74ABT16823 |
| JESD-30 Code | R-PDSO-G56 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 5V |
74ABT16823ADGG,112 Overview
The package is in the form of 56-TFSOP (0.240, 6.10mm Width). A package named Tubeincludes it. As configured, the output uses Tri-State, Non-Inverted. This trigger uses the value Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A 4.5V~5.5Vsupply voltage is required for it to operate. In the operating environment, the temperature is -40°C~85°C TA. This D latch has the type D-Type. FPGAs belonging to the 74ABTseries contain this type of chip. This D flip flop should not have a frequency greater than 190MHz. The list contains 2 elements. There is a consumption of 1mAof quiescent energy. There are 56 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 74ABT16823 family contains this object. The D flip flop is powered by a voltage of 5V . This JK flip flop has a 4pFfarad input capacitance. ABTis the family of this D flip flop. The part is included in FF/Latches. The maximal supply voltage (Vsup) reaches 5.5V. The supply voltage (Vsup) should be kept above 4.5V for normal operation. The power supply is 5V. The flip flop has 2ports embedded within it. Additionally, there are WITH CLEAR AND CLOCK ENABLE on the electronic flip flop that can be referred to.
74ABT16823ADGG,112 Features
Tube package
74ABT series
5V power supplies
74ABT16823ADGG,112 Applications
There are a lot of NXP USA Inc. 74ABT16823ADGG,112 Flip Flops applications.
- Balanced 24 mA output drivers
- Modulo – n – counter
- Safety Clamp
- QML qualified product
- CMOS Process
- Registers
- Computing
- 2 – Bit synchronous counter
- Frequency Divider circuits
- Communications
