Parameters |
Base Part Number |
74ABT374 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.5V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
300MHz |
Family |
ABT |
Current - Quiescent (Iq) |
250μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Output Polarity |
TRUE |
Max I(ol) |
0.064 A |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
4.9ns @ 5V, 50pF |
Prop. Delay@Nom-Sup |
5.2 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
5.2 ns |
Power Supply Current-Max (ICC) |
30mA |
Max Frequency@Nom-Sup |
200000000Hz |
Height Seated (Max) |
2mm |
Length |
7.2mm |
Width |
5.3mm |
RoHS Status |
ROHS3 Compliant |
Mounting Type |
Surface Mount |
Package / Case |
20-SSOP (0.209, 5.30mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74ABT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Technology |
BICMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
74ABT374ADB,112 Overview
20-SSOP (0.209, 5.30mm Width)is the way it is packaged. Package Tubeembeds it. Tri-State, Non-Invertedis the output configured for it. It is configured with the trigger Positive Edge. There is an electric part mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis required for its operation. It is operating at a temperature of -40°C~85°C TA. The type of this D latch is D-Type. The FPGA belongs to the 74ABT series. It should not exceed 300MHzin its output frequency. D latch consists of 1 elements. This process consumes 250μA quiescents. Terminations are 20. This D latch belongs to the family of 74ABT374. The power source is powered by 5V. Its input capacitance is 4pF farads. This D flip flop belongs to the family of ABT. This part is included in FF/Latches. Vsup reaches its maximum value at 5.5V. The supply voltage (Vsup) should be kept above 4.5V for normal operation. The system runs on a power supply of 5V watts. This flip flop has a total of 2ports.
74ABT374ADB,112 Features
Tube package
74ABT series
5V power supplies
74ABT374ADB,112 Applications
There are a lot of NXP USA Inc. 74ABT374ADB,112 Flip Flops applications.
- Latch-up performance
- Single Down Count-Control Line
- ESD performance
- Counters
- Event Detectors
- Memory
- ATE
- Frequency Dividers
- Modulo – n – counter
- Bus hold