74ABT374AN,112
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 20-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ABT |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | BICMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74ABT374 |
| JESD-30 Code | R-PDIP-T20 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Clock Frequency | 300MHz |
| Family | ABT |
| Current - Quiescent (Iq) | 250μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.064 A |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 4.9ns @ 5V, 50pF |
| Prop. Delay@Nom-Sup | 5.2 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 5.2 ns |
| Power Supply Current-Max (ICC) | 30mA |
| Max Frequency@Nom-Sup | 200000000Hz |
| Height Seated (Max) | 4.2mm |
| Length | 26.73mm |
| Width | 7.62mm |
| RoHS Status | ROHS3 Compliant |
74ABT374AN,112 Overview
The flip flop is packaged in a case of 20-DIP (0.300, 7.62mm). A package named Tubeincludes it. The output it is configured with uses Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. Through Holeis in the way of this electric part. With a supply voltage of 4.5V~5.5V volts, it operates. It is operating at -40°C~85°C TA. This logic flip flop is classified as type D-Type. JK flip flop is a part of the 74ABTseries of FPGAs. This D flip flop should not have a frequency greater than 300MHz. A total of 1elements are present in it. As a result, it consumes 250μA quiescent current. The number of terminations is 20. This D latch belongs to the family of 74ABT374. A voltage of 5V is used as the power supply for this D latch. JK flip flop input capacitance is 4pF farads. The electronic device belongs to the ABTfamily. This device has the base part number FF/Latches. In this case, the maximum supply voltage (Vsup) reaches 5.5V. Normally, the supply voltage (Vsup) should be above 4.5V. It operates from 5V power supplies. The D flip flop is embedded with 2ports.
74ABT374AN,112 Features
Tube package
74ABT series
5V power supplies
74ABT374AN,112 Applications
There are a lot of NXP USA Inc. 74ABT374AN,112 Flip Flops applications.
- ESD protection
- ATE
- Power down protection
- Computing
- Functionally equivalent to the MC10/100EL29
- Pattern generators
- Patented noise
- Frequency division
- Frequency Divider circuits
- Bus hold
