74ABT374CSC
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ABT |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | BICMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 200MHz |
| Family | ABT |
| Current - Quiescent (Iq) | 50μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Propagation Delay (tpd) | 5 ns |
| Height Seated (Max) | 2.642mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74ABT374CSC Overview
It is embeded in 20-SOIC (0.295, 7.50mm Width) case. The package Tubecontains it. This output is configured with Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountis occupied by this electronic component. A supply voltage of 4.5V~5.5V is required for operation. It is operating at a temperature of -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. In terms of FPGAs, it belongs to the 74ABT series. A frequency of 200MHzshould be the maximum output frequency. The element count is 1 . Despite external influences, it consumes 50μAof quiescent current. There are 20 terminations,A voltage of 5V provides power to the D latch. Its input capacitance is 5pFfarads. This D flip flop belongs to the family of ABT. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. For normal operation, the supply voltage (Vsup) should be kept above 4.5V. The D flip flop is embedded with 2ports.
74ABT374CSC Features
Tube package
74ABT series
74ABT374CSC Applications
There are a lot of Rochester Electronics, LLC 74ABT374CSC Flip Flops applications.
- CMOS Process
- Communications
- ESD protection
- ESD performance
- Memory
- ESCC
- EMI reduction circuitry
- Data transfer
- Asynchronous counter
- Balanced Propagation Delays
