Parameters |
Mounting Type |
Through Hole |
Package / Case |
20-DIP (0.300, 7.62mm) |
Surface Mount |
NO |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74ACT |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
NOT SPECIFIED |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
5V |
Terminal Pitch |
2.54mm |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
JESD-30 Code |
R-PDIP-T20 |
Function |
Standard |
Qualification Status |
COMMERCIAL |
Output Type |
Tri-State, Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Supply Voltage-Min (Vsup) |
4.5V |
Number of Ports |
2 |
Clock Frequency |
100MHz |
Family |
ACT |
Current - Quiescent (Iq) |
40μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
11.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Length |
26.075mm |
Width |
7.62mm |
RoHS Status |
ROHS3 Compliant |
74ACT534PC Overview
20-DIP (0.300, 7.62mm)is the packaging method. As part of the package Tube, it is embedded. It is configured with Tri-State, Invertedas an output. The trigger configured with it uses Positive Edge. This electronic part is mounted in the way of Through Hole. A voltage of 4.5V~5.5Vis required for its operation. A temperature of -40°C~85°C TAis used in the operation. It is an electronic flip flop with the type D-Type. This type of FPGA is a part of the 74ACT series. Its output frequency should not exceed 100MHz Hz. The list contains 1 elements. As a result, it consumes 40μA of quiescent current without being affected by external factors. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The D flip flop is powered by a voltage of 5V . JK flip flop input capacitance is 4.5pF farads. In this case, the D flip flop belongs to the ACTfamily. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 4.5V. The flip flop contains 2ports.
74ACT534PC Features
Tube package
74ACT series
74ACT534PC Applications
There are a lot of Rochester Electronics, LLC 74ACT534PC Flip Flops applications.
- Test & Measurement
- Data transfer
- Digital electronics systems
- Functionally equivalent to the MC10/100EL29
- Latch
- Communications
- Parallel data storage
- Individual Asynchronous Resets
- Balanced 24 mA output drivers
- Memory