Parameters |
Mounting Type |
Through Hole |
Package / Case |
24-DIP (0.300, 7.62mm) |
Surface Mount |
NO |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74ACTQ |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
24 |
Type |
D-Type |
Additional Feature |
WITH CLEAR AND CLOCK ENABLE |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Supply Voltage |
5V |
Terminal Pitch |
2.54mm |
Reach Compliance Code |
unknown |
JESD-30 Code |
R-PDIP-T24 |
Function |
Master Reset |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Supply Voltage-Min (Vsup) |
4.5V |
Number of Ports |
2 |
Family |
ACT |
Current - Quiescent (Iq) |
80μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Output Polarity |
TRUE |
Number of Bits per Element |
9 |
Max Propagation Delay @ V, Max CL |
9ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Height Seated (Max) |
5.08mm |
Width |
7.62mm |
RoHS Status |
ROHS3 Compliant |
74ACTQ823SPC Overview
In the form of 24-DIP (0.300, 7.62mm), it has been packaged. The package Tubecontains it. T flip flop uses Tri-State, Non-Invertedas its output configuration. JK flip flop uses Positive Edgeas the trigger. This electronic part is mounted in the way of Through Hole. Powered by a 4.5V~5.5Vvolt supply, it operates as follows. -40°C~85°C TAis the operating temperature. It is an electronic flip flop with the type D-Type. The 74ACTQseries comprises this type of FPGA. A total of 1 elements are present. As a result, it consumes 80μA of quiescent current without being affected by external factors. In 24terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The D flip flop is powered by a voltage of 5V . A 4.5pFfarad input capacitance is provided by this T flip flop. In terms of electronic devices, this device belongs to the ACTfamily of devices. Vsup reaches its maximum value at 5.5V. Normally, the supply voltage (Vsup) should be kept above 4.5V. The D flip flop is embedded with 2ports. Additionally, you may refer to the D latch's additional WITH CLEAR AND CLOCK ENABLE.
74ACTQ823SPC Features
Tube package
74ACTQ series
74ACTQ823SPC Applications
There are a lot of Rochester Electronics, LLC 74ACTQ823SPC Flip Flops applications.
- Frequency Divider circuits
- Consumer
- Storage registers
- Frequency division
- Bus hold
- Asynchronous counter
- Circuit Design
- ESCC
- Data transfer
- Control circuits