74AHC74PW,112
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 14 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Published | 2013 |
| Series | 74AHC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74AHC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Clock Frequency | 115MHz |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 7.4 ns |
| Family | AHC |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 2μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 8mA 8mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74AHC74PW,112 Overview
It is embeded in 14-TSSOP (0.173, 4.40mm Width) case. The Tubepackage contains it. As configured, the output uses Differential. This trigger is configured to use Positive Edge. This electronic part is mounted in the way of Surface Mount. A voltage of 2V~5.5Vis required for its operation. A temperature of -40°C~125°C TAis considered to be the operating temperature. D-Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74AHCseries FPGA. Its output frequency should not exceed 115MHz Hz. This process consumes 2μA quiescents. There are 14 terminations,The 74AHC74family includes it. A voltage of 5V is used as the power supply for this D latch. This T flip flop has a capacitance of 3pF farads at the input. It belongs to the family of electronic devices known as AHC. There is an electronic component mounted in the way of Surface Mount. This board is designed with 14pins on it. Its clock edge trigger type is Positive Edge. A normal operating voltage (Vsup) should remain above 2V. Due to its superior flexibility, it uses 2 circuits. If high efficiency is to be achieved, the supply voltage should be maintained at 5V. There are 1 output lines on it.
74AHC74PW,112 Features
Tube package
74AHC series
14 pins
74AHC74PW,112 Applications
There are a lot of Nexperia USA Inc. 74AHC74PW,112 Flip Flops applications.
- Balanced Propagation Delays
- Data storage
- QML qualified product
- Registers
- Patented noise
- Memory
- Buffered Clock
- Memory
- Automotive
- Storage registers
