74AHC74PW/AUJ
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 14-TSSOP (0.173, 4.40mm Width) |
| Supplier Device Package | 14-TSSOP |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2013 |
| Series | 74AHC |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 2V~5.5V |
| Base Part Number | 74AHC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Number of Elements | 2 |
| Clock Frequency | 115MHz |
| Current - Quiescent (Iq) | 2μA |
| Current - Output High, Low | 8mA 8mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| RoHS Status | ROHS3 Compliant |
74AHC74PW/AUJ Overview
14-TSSOP (0.173, 4.40mm Width)is the packaging method. The package Tape & Reel (TR)contains it. It is configured with Differentialas an output. The trigger it is configured with uses Positive Edge. It is mounted in the way of Surface Mount. With a supply voltage of 2V~5.5V volts, it operates. It is at -40°C~125°C TAdegrees Celsius that the system is operating. The type of this D latch is D-Type. FPGAs belonging to the 74AHCseries contain this type of chip. There should be no greater frequency than 115MHzon its output. D latch consists of 2 elements. There is 2μA quiescent consumption. It is a member of the 74AHC74 family. The input capacitance of this T flip flop is 3pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded.
74AHC74PW/AUJ Features
Tape & Reel (TR) package
74AHC series
74AHC74PW/AUJ Applications
There are a lot of NXP USA Inc. 74AHC74PW/AUJ Flip Flops applications.
- EMI reduction circuitry
- Shift registers
- Asynchronous counter
- Storage Registers
- Automotive
- Modulo – n – counter
- Frequency Dividers
- Data transfer
- Power down protection
- Frequency division
