Parameters |
Factory Lead Time |
1 Week |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-VFQFN Exposed Pad |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74ALVC |
JESD-609 Code |
e4 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
QUAD |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74ALVC574 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
300MHz |
Propagation Delay |
7 ns |
Turn On Delay Time |
3.1 ns |
Family |
ALVC/VCX/A |
Current - Quiescent (Iq) |
10μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
3.6ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Number of Input Lines |
8 |
Clock Edge Trigger Type |
Positive Edge |
Length |
4.5mm |
Width |
2.5mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
74ALVC574BQ,115 Overview
It is embeded in 20-VFQFN Exposed Pad case. Package Tape & Reel (TR)embeds it. As configured, the output uses Tri-State, Non-Inverted. In the configuration of the trigger, Positive Edgeis used. Surface Mountis occupied by this electronic component. The JK flip flop operates at a voltage of 1.65V~3.6V. It is operating at a temperature of -40°C~85°C TA. A flip flop of this type is classified as a D-Type. It belongs to the 74ALVCseries of FPGAs. Its output frequency should not exceed 300MHz. In total, it contains 1 elements. As a result, it consumes 10μA quiescent current. 20terminations have occurred. The object belongs to the 74ALVC574 family. It is powered by a voltage of 2.7V . The input capacitance of this JK flip flopis 3.5pF farads. An electronic device belonging to the family ALVC/VCX/Acan be found here. There is an electronic component mounted in the way of Surface Mount. As you can see from the design, it has pins with 20. This device has the clock edge trigger type of Positive Edge. An electronic part with 8bits has been designed. The maximal supply voltage (Vsup) reaches 3.6V. There are 2 ports embedded in the flip flops. There are 8 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
74ALVC574BQ,115 Features
Tape & Reel (TR) package
74ALVC series
20 pins
8 Bits
74ALVC574BQ,115 Applications
There are a lot of Nexperia USA Inc. 74ALVC574BQ,115 Flip Flops applications.
- Test & Measurement
- Guaranteed simultaneous switching noise level
- QML qualified product
- Patented noise
- Event Detectors
- Buffer registers
- Digital electronics systems
- Automotive
- Single Down Count-Control Line
- Circuit Design