Parameters |
Voltage - Supply |
2.3V~2.7V 3V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Terminal Pitch |
0.635mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74ALVT162823 |
Function |
Master Reset |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Number of Ports |
2 |
Number of Bits |
9 |
Propagation Delay |
3 ns |
Quiescent Current |
3.9mA |
Turn On Delay Time |
3.7 ns |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
70μA |
Output Characteristics |
3-STATE WITH SERIES RESISTOR |
Current - Output High, Low |
8mA 12mA; 12mA 12mA |
Max Propagation Delay @ V, Max CL |
4.4ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Number of Output Lines |
9 |
Clock Edge Trigger Type |
Positive Edge |
Width |
7.5mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
56-BSSOP (0.295, 7.50mm Width) |
Number of Pins |
56 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74ALVT |
JESD-609 Code |
e4 |
Part Status |
Not For New Designs |
Moisture Sensitivity Level (MSL) |
2 (1 Year) |
Number of Terminations |
56 |
Type |
D-Type |
Additional Feature |
WITH CLEAR AND CLOCK ENABLE; CAN ALSO BE OPERATED AT 3.3+/-0.3V |
Technology |
BICMOS |
74ALVT162823DL,518 Overview
The flip flop is packaged in a case of 56-BSSOP (0.295, 7.50mm Width). Package Tape & Reel (TR)embeds it. T flip flop uses Tri-State, Non-Invertedas the output. It is configured with a trigger that uses a value of Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2.3V~2.7V 3V~3.6V volts. Temperature is set to -40°C~85°C TA. This electronic flip flop is of type D-Type. This type of FPGA is a part of the 74ALVT series. A total of 2elements are contained within it. There is a consumption of 70μAof quiescent energy. Terminations are 56. D latch belongs to the 74ALVT162823 family. The power supply voltage is 2.5V. JK flip flop input capacitance is 3pF farads. Surface Mount mounts this electronic component. As you can see from the design, it has pins with 56. It has a clock edge trigger type of Positive Edge. The design is based on 9bits. This D flip flop is equipped with 0 ports. It has 9 output lines to operate. There is a consumption of 3.9mAof quiescent current from it. WITH CLEAR AND CLOCK ENABLE; CAN ALSO BE OPERATED AT 3.3+/-0.3Vis also one of its characteristics.
74ALVT162823DL,518 Features
Tape & Reel (TR) package
74ALVT series
56 pins
9 Bits
74ALVT162823DL,518 Applications
There are a lot of Nexperia USA Inc. 74ALVT162823DL,518 Flip Flops applications.
- Convert a momentary switch to a toggle switch
- Safety Clamp
- Shift registers
- Set-reset capability
- Divide a clock signal by 2 or 4
- Count Modes
- Dynamic threshold performance
- Common Clocks
- Latch
- Counters