74ALVT16821DL,518
| Parameters | |
|---|---|
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-BSSOP (0.295, 7.50mm Width) |
| Number of Pins | 56 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ALVT |
| JESD-609 Code | e4 |
| Part Status | Not For New Designs |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 56 |
| Type | D-Type |
| Additional Feature | CAN ALSO OPERATE AT 3.3V VCC |
| Technology | BICMOS |
| Voltage - Supply | 2.3V~2.7V 3V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.635mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74ALVT16821 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 20 |
| Clock Frequency | 150MHz |
| Propagation Delay | 1.8 ns |
| Quiescent Current | 5.1mA |
| Turn On Delay Time | 1.7 ns |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 70μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 8mA 24mA; 32mA 64mA |
| Max Propagation Delay @ V, Max CL | 3.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Power Supply Current-Max (ICC) | 7mA |
| Number of Output Lines | 10 |
| Clock Edge Trigger Type | Positive Edge |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74ALVT16821DL,518 Overview
It is embeded in 56-BSSOP (0.295, 7.50mm Width) case. It is contained within the Tape & Reel (TR)package. The output it is configured with uses Tri-State, Non-Inverted. This trigger is configured to use Positive Edge. This electronic part is mounted in the way of Surface Mount. It operates with a supply voltage of 2.3V~2.7V 3V~3.6V. A temperature of -40°C~85°C TAis used in the operation. D-Typeis the type of this D latch. In this case, it is a type of FPGA belonging to the 74ALVT series. In order for it to function properly, its output frequency should not exceed 150MHz. The list contains 2 elements. This process consumes 70μA quiescents. Currently, there are 56 terminations. The object belongs to the 74ALVT16821 family. The D flip flop is powered by a voltage of 2.5V . JK flip flop input capacitance is 3pF farads. Surface Mount mounts this electronic component. 56pins are included in its design. This device's clock edge trigger type is Positive Edge. An electronic part designed with 20bits is used in this application. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. There are 10 output lines in this JK flip flop. This D latch consumes 5.1mA quiescent current at all. CAN ALSO OPERATE AT 3.3V VCCis also one of its characteristics.
74ALVT16821DL,518 Features
Tape & Reel (TR) package
74ALVT series
56 pins
20 Bits
74ALVT16821DL,518 Applications
There are a lot of Nexperia USA Inc. 74ALVT16821DL,518 Flip Flops applications.
- Data Synchronizers
- Clock pulse
- Storage Registers
- Computing
- Counters
- Synchronous counter
- Latch
- ESD performance
- 2 – Bit synchronous counter
- Count Modes
