74ALVT16823DGG,112
| Parameters | |
|---|---|
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-TFSOP (0.240, 6.10mm Width) |
| Number of Pins | 56 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ALVT |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 56 |
| Type | D-Type |
| Additional Feature | USER SELECTABLE 3.3V VCC |
| Subcategory | FF/Latches |
| Technology | BICMOS |
| Voltage - Supply | 2.3V~2.7V 3V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74ALVT16823 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Power Supplies | 3.3V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 18 |
| Clock Frequency | 250MHz |
| Propagation Delay | 1.9 ns |
| Quiescent Current | 3.9mA |
| Turn On Delay Time | 2.9 ns |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 100μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 8mA 24mA; 32mA 64mA |
| Max I(ol) | 0.064 A |
| Max Propagation Delay @ V, Max CL | 3.1ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 3.1 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Output Lines | 9 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 14.15mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
74ALVT16823DGG,112 Overview
The flip flop is packaged in 56-TFSOP (0.240, 6.10mm Width). You can find it in the Tubepackage. This output is configured with Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. Surface Mountis positioned in the way of this electronic part. It operates with a supply voltage of 2.3V~2.7V 3V~3.6V. It is operating at -40°C~85°C TA. The type of this D latch is D-Type. It belongs to the 74ALVTseries of FPGAs. A frequency of 250MHzshould be the maximum output frequency. A total of 2elements are contained within it. During its operation, it consumes 100μA quiescent energy. The number of terminations is 56. The 74ALVT16823 family contains this object. The power supply voltage is 2.5V. A JK flip flop with a 3pFfarad input capacitance is used here. There is an electronic part mounted in the way of Surface Mount. This board has 56 pins. It has a clock edge trigger type of Positive Edge. It is part of the FF/Latchesbase part number family. 18bits are used in its design. The power supply is 3.3V. A total of 2ports are embedded in the D flip flop. In order for the chip to function, it has 9output lines. In terms of quiescent current, it consumes 3.9mA . Furthermore, it has USER SELECTABLE 3.3V VCCas a characteristic.
74ALVT16823DGG,112 Features
Tube package
74ALVT series
56 pins
18 Bits
3.3V power supplies
74ALVT16823DGG,112 Applications
There are a lot of Nexperia USA Inc. 74ALVT16823DGG,112 Flip Flops applications.
- Balanced Propagation Delays
- Power down protection
- EMI reduction circuitry
- Memory
- Common Clocks
- Asynchronous counter
- Individual Asynchronous Resets
- Divide a clock signal by 2 or 4
- Shift Registers
- Matched Rise and Fall
