74AUC16374DGGRG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 48-TFSOP (0.240, 6.10mm Width) |
| Number of Pins | 48 |
| Weight | 223.195796mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 48 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUC16374 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Load Capacitance | 15pF |
| Number of Ports | 2 |
| Output Current | 9mA |
| Number of Bits | 16 |
| Clock Frequency | 250MHz |
| Propagation Delay | 2.8 ns |
| Quiescent Current | 20μA |
| Family | AUC |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.009 A |
| Max Propagation Delay @ V, Max CL | 2.2ns @ 2.5V, 30pF |
| Prop. Delay@Nom-Sup | 4.5 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Output Lines | 8 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 1.2mm |
| Length | 12.5mm |
| Width | 6.1mm |
| Thickness | 1.15mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74AUC16374DGGRG4 Overview
The flip flop is packaged in a case of 48-TFSOP (0.240, 6.10mm Width). A package named Tape & Reel (TR)includes it. T flip flop uses Tri-State, Non-Invertedas the output. There is a trigger configured with Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. With a supply voltage of 0.8V~2.7V volts, it operates. -40°C~85°C TAis the operating temperature. D-Typeis the type of this D latch. It is a type of FPGA belonging to the 74AUC series. A frequency of 250MHzshould be the maximum output frequency. The element count is 2 . It has been determined that there have been 48 terminations. JK flip flop belongs to 74AUC16374 family. A voltage of 1.2V is used to power it. The input capacitance of this T flip flop is 3pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. The electronic device belongs to the AUCfamily. There is an electronic component mounted in the way of Surface Mount. The electronic flip flop is designed with pins 48. This device exhibits a clock edge trigger type of Positive Edge. This part is included in FF/Latches. The flip flop is designed with 16bits. On the basis of its reliable performance, this D flip flop is well suited for use with TR. This D flip flop is equipped with 0 ports. With an output current of 9mA, this device offers maximum design flexibility. The JK flip flop is with 8 output lines to operate. It consumes a total of 20μA quiescent current at any given time.
74AUC16374DGGRG4 Features
Tape & Reel (TR) package
74AUC series
48 pins
16 Bits
74AUC16374DGGRG4 Applications
There are a lot of Texas Instruments 74AUC16374DGGRG4 Flip Flops applications.
- ATE
- Cold spare funcion
- Shift Registers
- Clock pulse
- Single Up Count-Control Line
- Buffer registers
- Computers
- Test & Measurement
- Frequency Divider circuits
- Individual Asynchronous Resets
