74AUP2G80GD,125

0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop DUAL 74AUP2G80 8 Pins 74AUP Series 8-XFDFN

Manufacturer: Nexperia USA Inc.
Nocochips NO: 554-74AUP2G80GD,125
Package: 8-XFDFN
Datasheet: PDF
Stock: 621
Description: 0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop DUAL 74AUP2G80 8 Pins 74AUP Series 8-XFDFN(Kg)

Details

Tags

Parameters
Factory Lead Time	1 Week
Contact Plating	Gold
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	8-XFDFN
Number of Pins	8
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Published	2010
Series	74AUP
JESD-609 Code	e4
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	8
Type	D-Type
Subcategory	FF/Latches
Packing Method	TAPE AND REEL
Technology	CMOS
Voltage - Supply	0.8V~3.6V
Terminal Position	DUAL
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.2V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	40
Base Part Number	74AUP2G80
Function	Standard
Output Type	Inverted
Number of Elements	2
Polarity	Inverting
Supply Voltage-Max (Vsup)	3.6V
Load Capacitance	30pF
Number of Bits	1
Clock Frequency	309MHz
Propagation Delay	20.7 ns
Quiescent Current	500nA
Turn On Delay Time	2.2 ns
Family	AUP/ULP/V
Current - Output High, Low	4mA 4mA
Max Propagation Delay @ V, Max CL	6.4ns @ 3.3V, 30pF
Trigger Type	Positive Edge
Input Capacitance	0.6pF
Number of Output Lines	1
Clock Edge Trigger Type	Positive Edge
Max Frequency@Nom-Sup	70000000Hz
Height Seated (Max)	0.5mm
Length	3mm
Radiation Hardening	No
RoHS Status	RoHS Compliant

74AUP2G80GD,125 Overview

The item is packaged in 8-XFDFNcases. As part of the package Tape & Reel (TR), it is embedded. There is a Invertedoutput configured with it. There is a trigger configured with Positive Edge. Surface Mountmounts this electrical part. The JK flip flop operates with an input voltage of 0.8V~3.6V volts. It is operating at -40°C~125°C TA. D-Typedescribes this flip flop. FPGAs belonging to the 74AUPseries contain this type of chip. Its output frequency should not exceed 309MHz Hz. There are 2 elements in it. There have been 8 terminations. This D latch belongs to the family of 74AUP2G80. Power is provided by a 1.2V supply. This T flip flop has a capacitance of 0.6pF farads at the input. The electronic device belongs to the AUP/ULP/Vfamily. Electronic part Surface Mountis mounted in the way. It is designed with 8 pins. A Positive Edgeclock edge trigger is used in this device. The RS flip flops belongs to FF/Latches base part number. The design is based on 1bits. 3.6Vis the maximum supply voltage (Vsup). As a result of its reliable performance, this T flip flop is suitable for TAPE AND REEL. There are 1 output Lines, which generate the binary equivalent of the input line whose value is equal to “1” and are available to encode either a decimal or hexadecimal input pattern to typically a binary or “B. C. D” (binary coded decimal) output code. It consumes 500nA of quiescent current without being affected by external factors.