74F109SJX
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 16 |
| Supplier Device Package | 16-SOP |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74F |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | JK Type |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Voltage - Supply | 4.5V~5.5V |
| Frequency | 125MHz |
| Base Part Number | 74F109 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Number of Circuits | 2 |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of Bits | 2 |
| Clock Frequency | 125MHz |
| Propagation Delay | 8 ns |
| Turn On Delay Time | 5.2 ns |
| Logic Function | AND, Flip-Flop |
| Current - Quiescent (Iq) | 17mA |
| Current - Output High, Low | 1mA 20mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 8ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| High Level Output Current | -1mA |
| Low Level Output Current | 20mA |
| Number of Input Lines | 2 |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
74F109SJX Overview
It is embeded in 16-SOIC (0.209, 5.30mm Width) case. D flip flop is embedded in the Tape & Reel (TR) package. There is a Differentialoutput configured with it. This trigger is configured to use Positive Edge. There is an electronic component mounted in the way of Surface Mount. A supply voltage of 4.5V~5.5V is required for operation. It is at 0°C~70°C TAdegrees Celsius that the system is operating. This logic flip flop is classified as type JK Type. It is a type of FPGA belonging to the 74F series. In order for it to function properly, its output frequency should not exceed 125MHz. A total of 2 elements are present. It consumes 17mA of quiescent This D latch belongs to the family of 74F109. There is an electronic part mounted in the way of Surface Mount. With its 16pins, it is designed to work with most electronic flip flops. The clock edge trigger type for this device is Positive Edge. There are 2bits in its design. Due to its superior flexibility, it uses 2 circuits. In order to achieve high efficiency, the supply voltage should be maintained at 5V. There are 3 output Lines, which generate the binary equivalent of the input line whose value is equal to “1” and are available to encode either a decimal or hexadecimal input pattern to typically a binary or “B. C. D” (binary coded decimal) output code. A total of 2input lines have been provided. -1mA is set as the high level output current. In the low level output current setting, 20mAis used. A temperature below 70°Cis recommended for operation. Ideally, the operating temperature should be greater than 0°C. Initially, it requires a voltage of 4.5V as the minimum supply voltage. It supports a maximum supply voltage of 5.5V volts. The frequency that can be achieved is 125MHz.
74F109SJX Features
Tape & Reel (TR) package
74F series
16 pins
2 Bits
74F109SJX Applications
There are a lot of ON Semiconductor 74F109SJX Flip Flops applications.
- ESD protection
- EMI reduction circuitry
- Shift Registers
- Computers
- Communications
- ATE
- Counters
- Pattern generators
- Set-reset capability
- Common Clocks
