74F112SCX
| Parameters | |
|---|---|
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74F |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Terminal Finish | MATTE TIN |
| Technology | TTL |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Clock Frequency | 105MHz |
| Family | F/FAST |
| Current - Quiescent (Iq) | 19mA |
| Current - Output High, Low | 1mA 20mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 6.5ns @ 5V, 50pF |
| Trigger Type | Negative Edge |
| Propagation Delay (tpd) | 7.5 ns |
| fmax-Min | 80 MHz |
| Length | 9.9mm |
| Width | 3.9mm |
74F112SCX Overview
16-SOIC (0.154, 3.90mm Width)is the packaging method. D flip flop is included in the Tape & Reel (TR)package. Currently, the output is configured to use Differential. Negative Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Surface Mount. It operates with a supply voltage of 4.5V~5.5V. A temperature of 0°C~70°C TAis considered to be the operating temperature. It belongs to the type JK Typeof flip flops. The FPGA belongs to the 74F series. Its output frequency should not exceed 105MHz. A total of 2elements are present in it. During its operation, it consumes 19mA quiescent energy. It has been determined that there have been 16 terminations. An input voltage of 5Vpowers the D latch. A device of this type belongs to the family of F/FAST. The maximal supply voltage (Vsup) reaches 5.5V. For normal operation, the supply voltage (Vsup) should be kept above 4.5V.
74F112SCX Features
Tape & Reel (TR) package
74F series
74F112SCX Applications
There are a lot of Rochester Electronics, LLC 74F112SCX Flip Flops applications.
- Load Control
- Computers
- Dynamic threshold performance
- Matched Rise and Fall
- Cold spare funcion
- Reduced system switching noise
- Data transfer
- Differential Individual
- Individual Asynchronous Resets
- Asynchronous counter
