74F564SJ
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 20 |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tube |
| Series | 74F |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 4.5V~5.5V |
| Base Part Number | 74F564 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 8 |
| Clock Frequency | 100MHz |
| Propagation Delay | 8.5 ns |
| Turn On Delay Time | 5.2 ns |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 86mA |
| Current - Output High, Low | 3mA 24mA |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Clock Edge Trigger Type | Positive Edge |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
74F564SJ Overview
20-SOIC (0.209, 5.30mm Width)is the way it is packaged. As part of the package Tube, it is embedded. T flip flop uses Tri-State, Non-Invertedas the output. It is configured with a trigger that uses a value of Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at 4.5V~5.5Vvolts. Currently, the operating temperature is 0°C~70°C TA. D-Typeis the type of this D latch. In terms of FPGAs, it belongs to the 74F series. There should be no greater frequency than 100MHzon its output. A total of 1elements are contained within it. As a result, it consumes 86mA quiescent current. The object belongs to the 74F564 family. It is mounted in the way of Surface Mount. A total of 20pins are provided on this board. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. Using 8 circuits, it is highly flexible. In order to achieve high efficiency, the supply voltage should be maintained at 5V.
74F564SJ Features
Tube package
74F series
20 pins
74F564SJ Applications
There are a lot of ON Semiconductor 74F564SJ Flip Flops applications.
- ATE
- EMI reduction circuitry
- Balanced 24 mA output drivers
- Data transfer
- Pattern generators
- Guaranteed simultaneous switching noise level
- Divide a clock signal by 2 or 4
- Instrumentation
- Count Modes
- Safety Clamp
