Parameters |
Mounting Type |
Surface Mount |
Package / Case |
24-SOIC (0.295, 7.50mm Width) |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74F |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
24 |
Type |
D-Type |
Terminal Finish |
MATTE TIN |
Additional Feature |
WITH CLEAR AND CLOCK ENABLE |
Technology |
TTL |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
JESD-30 Code |
R-PDSO-G24 |
Function |
Master Reset |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Supply Voltage-Min (Vsup) |
4.5V |
Number of Ports |
2 |
Clock Frequency |
160MHz |
Family |
F/FAST |
Current - Quiescent (Iq) |
100mA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
3mA 24mA |
Output Polarity |
TRUE |
Number of Bits per Element |
9 |
Max Propagation Delay @ V, Max CL |
9.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
RoHS Status |
ROHS3 Compliant |
74F823SCX Overview
It is packaged in the way of 24-SOIC (0.295, 7.50mm Width). Package Tape & Reel (TR)embeds it. T flip flop uses Tri-State, Non-Invertedas its output configuration. The trigger configured with it uses Positive Edge. There is an electric part mounted in the way of Surface Mount. A 4.5V~5.5Vsupply voltage is required for it to operate. It is operating at 0°C~70°C TA. A flip flop of this type is classified as a D-Type. In this case, it is a type of FPGA belonging to the 74F series. Its output frequency should not exceed 160MHz Hz. A total of 1 elements are present. T flip flop consumes 100mA quiescent energy. 24terminations have occurred. The power supply voltage is 5V. F/FASTis the family of this D flip flop. There is a 5.5Vmaximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be above 4.5V. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. There is also a characteristic of WITH CLEAR AND CLOCK ENABLE.
74F823SCX Features
Tape & Reel (TR) package
74F series
74F823SCX Applications
There are a lot of Rochester Electronics, LLC 74F823SCX Flip Flops applications.
- Parallel data storage
- Memory
- Common Clocks
- Functionally equivalent to the MC10/100EL29
- Pattern generators
- QML qualified product
- Frequency Divider circuits
- Synchronous counter
- Bounce elimination switch
- Digital electronics systems