Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74HC |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
BROADSIDE VERSION OF 534 |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74HC564 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
6V |
Power Supplies |
2/6V |
Supply Voltage-Min (Vsup) |
2V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
137MHz |
Family |
HC/UH |
Current - Quiescent (Iq) |
8μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
7.8mA 7.8mA |
Max I(ol) |
0.006 A |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
28ns @ 6V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Propagation Delay (tpd) |
250 ns |
Max Frequency@Nom-Sup |
24000000Hz |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
RoHS Status |
ROHS3 Compliant |
74HC564D,653 Overview
It is embeded in 20-SOIC (0.295, 7.50mm Width) case. D flip flop is included in the Tape & Reel (TR)package. In the configuration, Tri-State, Invertedis used as the output. JK flip flop uses Positive Edgeas the trigger. Surface Mountis occupied by this electronic component. A voltage of 2V~6Vis used as the supply voltage. The operating temperature is -40°C~125°C TA. D-Typeis the type of this D latch. It belongs to the 74HCseries of FPGAs. A frequency of 137MHzshould not be exceeded by its output. A total of 1elements are contained within it. This process consumes 8μA quiescents. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Members of the 74HC564family make up this object. An input voltage of 5Vpowers the D latch. The input capacitance of this T flip flop is 3.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It belongs to the family of electronic devices known as HC/UH. There is a FF/Latchesbase part number assigned to the RS flip flops. It reaches 6Vwhen the maximum supply voltage (Vsup) is applied. It is imperative that the supply voltage (Vsup) is maintained above 2Vin order to ensure normal operation. In light of its reliable performance, this T flip flop is well suited for TAPE AND REEL. A total of 2/6V power supplies are needed to run it. A D flip flop with 2embedded ports is available. In addition, you can refer to the additinal BROADSIDE VERSION OF 534 of the D latch.
74HC564D,653 Features
Tape & Reel (TR) package
74HC series
2/6V power supplies
74HC564D,653 Applications
There are a lot of NXP USA Inc. 74HC564D,653 Flip Flops applications.
- Registers
- Safety Clamp
- Test & Measurement
- ESCC
- ATE
- Single Up Count-Control Line
- Power down protection
- QML qualified product
- Counters
- Computing