Parameters |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74HCT112 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Number of Elements |
2 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.5V |
Load Capacitance |
50pF |
Clock Frequency |
64MHz |
Family |
HCT |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
4mA 4mA |
Output Polarity |
COMPLEMENTARY |
Max I(ol) |
0.004 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
35ns @ 4.5V, 50pF |
Trigger Type |
Negative Edge |
Input Capacitance |
3.5pF |
Propagation Delay (tpd) |
60 ns |
Height Seated (Max) |
4.7mm |
RoHS Status |
ROHS3 Compliant |
Mounting Type |
Through Hole |
Package / Case |
16-DIP (0.300, 7.62mm) |
Surface Mount |
NO |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tube |
Published |
1997 |
Series |
74HCT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Type |
JK Type |
Terminal Finish |
NICKEL PALLADIUM GOLD |
74HCT112N,652 Overview
As a result, it is packaged as 16-DIP (0.300, 7.62mm). It is contained within the Tubepackage. Currently, the output is configured to use Differential. It is configured with a trigger that uses a value of Negative Edge. This electronic part is mounted in the way of Through Hole. The JK flip flop operates at a voltage of 4.5V~5.5V. -40°C~125°C TAis the operating temperature. It is an electronic flip flop with the type JK Type. FPGAs belonging to the 74HCTseries contain this type of chip. You should not exceed 64MHzin its output frequency. In total, there are 2 elements. There is 4μA quiescent consumption. A total of 16 terminations have been made. Members of the 74HCT112family make up this object. A voltage of 5V is used as the power supply for this D latch. A JK flip flop with a 3.5pFfarad input capacitance is used here. This D flip flop belongs to the family of HCT. It is included in FF/Latches. In this case, the maximum supply voltage (Vsup) reaches 5.5V. Normal operation requires a supply voltage (Vsup) above 4.5V. The power supply is 5V.
74HCT112N,652 Features
Tube package
74HCT series
5V power supplies
74HCT112N,652 Applications
There are a lot of NXP USA Inc. 74HCT112N,652 Flip Flops applications.
- EMI reduction circuitry
- Buffered Clock
- Latch
- Frequency Divider circuits
- Buffer registers
- Data Synchronizers
- Data storage
- Safety Clamp
- Modulo – n – counter
- Digital electronics systems