Parameters |
Factory Lead Time |
1 Week |
Mounting Type |
Surface Mount |
Package / Case |
20-SSOP (0.209, 5.30mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tube |
Published |
1997 |
Series |
74HCT |
JESD-609 Code |
e4 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74HCT374 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Supply Voltage-Min (Vsup) |
4.5V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
44MHz |
Family |
HCT |
Current - Quiescent (Iq) |
4μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
6mA 6mA |
Output Polarity |
TRUE |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
32ns @ 4.5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Height Seated (Max) |
2mm |
Length |
7.2mm |
Width |
5.3mm |
RoHS Status |
ROHS3 Compliant |
74HCT374DB,112 Overview
The flip flop is packaged in 20-SSOP (0.209, 5.30mm Width). The package Tubecontains it. As configured, the output uses Tri-State, Non-Inverted. This trigger uses the value Positive Edge. Surface Mountis positioned in the way of this electronic part. A 4.5V~5.5Vsupply voltage is required for it to operate. -40°C~125°C TAis the operating temperature. It belongs to the type D-Typeof flip flops. This type of FPGA is a part of the 74HCT series. This D flip flop should not have a frequency greater than 44MHz. In total, it contains 1 elements. It consumes 4μA of quiescent Terminations are 20. If you search by 74HCT374, you will find similar parts. A voltage of 5V is used to power it. JK flip flop input capacitance is 3.5pF farads. Electronic devices of this type belong to the HCTfamily. Vsup reaches 5.5V, the maximal supply voltage. A normal operating voltage (Vsup) should remain above 4.5V. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.
74HCT374DB,112 Features
Tube package
74HCT series
74HCT374DB,112 Applications
There are a lot of Nexperia USA Inc. 74HCT374DB,112 Flip Flops applications.
- Buffered Clock
- Divide a clock signal by 2 or 4
- Buffer registers
- Communications
- Dynamic threshold performance
- Latch
- Asynchronous counter
- Reduced system switching noise
- Balanced 24 mA output drivers
- Event Detectors