74LVC1G80GW,165
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 5-TSSOP, SC-70-5, SOT-353 |
| Number of Pins | 5 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2014 |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| Type | D-Type |
| Terminal Finish | TIN |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC1G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Power Supplies | 3.3V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 400MHz |
| Propagation Delay | 2.4 ns |
| Turn On Delay Time | 1.8 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 200μA |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| RoHS Status | RoHS Compliant |
74LVC1G80GW,165 Overview
5-TSSOP, SC-70-5, SOT-353is the packaging method. A package named Tape & Reel (TR)includes it. Invertedis the output configured for it. There is a trigger configured with Positive Edge. It is mounted in the way of Surface Mount. A supply voltage of 1.65V~5.5V is required for operation. Currently, the operating temperature is -40°C~125°C TA. This electronic flip flop is of type D-Type. In this case, it is a type of FPGA belonging to the 74LVC series. In order for it to function properly, its output frequency should not exceed 400MHz. There is 200μA quiescent consumption. The number of terminations is 5. The object belongs to the 74LVC1G80 family. A voltage of 1.8V provides power to the D latch. The input capacitance of this T flip flop is 5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Electronic devices of this type belong to the LVC/LCX/Zfamily. There is an electronic part mounted in the way of Surface Mount. It is designed with 5 pins. This device has the clock edge trigger type of Positive Edge. It is included in FF/Latches. There are 1bits in this flip flop. Its flexibility is enhanced by 1 circuits. In light of its reliable performance, this T flip flop is well suited for TAPE AND REEL. In order for the device to operate, it requires 3.3V power supplies.
74LVC1G80GW,165 Features
Tape & Reel (TR) package
74LVC series
5 pins
1 Bits
3.3V power supplies
74LVC1G80GW,165 Applications
There are a lot of Nexperia USA Inc. 74LVC1G80GW,165 Flip Flops applications.
- Balanced Propagation Delays
- CMOS Process
- Cold spare funcion
- EMI reduction circuitry
- Control circuits
- Latch-up performance
- Functionally equivalent to the MC10/100EL29
- Registers
- High Performance Logic for test systems
- Buffered Clock
