74LVC1G80GX,125
| Parameters | |
|---|---|
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Length | 0.8mm |
| Width | 0.8mm |
| RoHS Status | ROHS3 Compliant |
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 4-XFDFN Exposed Pad |
| Number of Pins | 5 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2014 |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | NO LEAD |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.48mm |
| Base Part Number | 74LVC1G80 |
| Function | Standard |
| Output Type | Inverted |
| Number of Elements | 1 |
| Polarity | Inverting |
| Number of Bits | 1 |
| Clock Frequency | 400MHz |
| Propagation Delay | 13 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 200μA |
| Current - Output High, Low | 32mA 32mA |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
74LVC1G80GX,125 Overview
4-XFDFN Exposed Padis the packaging method. A package named Tape & Reel (TR)includes it. The output it is configured with uses Inverted. Positive Edgeis the trigger it is configured with. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~5.5V. Currently, the operating temperature is -40°C~125°C TA. It belongs to the type D-Typeof flip flops. It is a type of FPGA belonging to the 74LVC series. A frequency of 400MHzshould not be exceeded by its output. A total of 1elements are present in it. T flip flop consumes 200μA quiescent energy. There have been 5 terminations. The object belongs to the 74LVC1G80 family. An input voltage of 3.3Vpowers the D latch. A JK flip flop with a 5pFfarad input capacitance is used here. LVC/LCX/Zis the family of this D flip flop. There is an electronic part mounted in the way of Surface Mount. A total of 5pins are provided on this board. This device has Positive Edgeas its clock edge trigger type. 1bits are used in its design.
74LVC1G80GX,125 Features
Tape & Reel (TR) package
74LVC series
5 pins
1 Bits
74LVC1G80GX,125 Applications
There are a lot of Nexperia USA Inc. 74LVC1G80GX,125 Flip Flops applications.
- Reduced system switching noise
- Event Detectors
- Consumer
- QML qualified product
- Modulo – n – counter
- Convert a momentary switch to a toggle switch
- ESD performance
- Shift registers
- Latch-up performance
- Clock pulse
