74LVC273PW/AUJ
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2005 |
| Series | 74LVC |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 1.65V~3.6V |
| Base Part Number | 74LVC273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 230MHz |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 8.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| RoHS Status | ROHS3 Compliant |
74LVC273PW/AUJ Overview
It is embeded in 20-TSSOP (0.173, 4.40mm Width) case. As part of the package Tape & Reel (TR), it is embedded. Currently, the output is configured to use Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. It is mounted in the way of Surface Mount. It operates with a supply voltage of 1.65V~3.6V. It is operating at a temperature of -40°C~125°C TA. This D latch has the type D-Type. In FPGA terms, D flip flop is a type of 74LVCseries FPGA. In order for it to function properly, its output frequency should not exceed 230MHz. A total of 1elements are present in it. There is a consumption of 10μAof quiescent energy. The object belongs to the 74LVC273 family. This T flip flop has a capacitance of 5pF farads at the input.
74LVC273PW/AUJ Features
Tape & Reel (TR) package
74LVC series
74LVC273PW/AUJ Applications
There are a lot of NXP USA Inc. 74LVC273PW/AUJ Flip Flops applications.
- Individual Asynchronous Resets
- Bus hold
- Asynchronous counter
- Functionally equivalent to the MC10/100EL29
- ESCC
- Latch-up performance
- ATE
- Single Up Count-Control Line
- Storage registers
- Frequency Divider circuits
