74LVC377D,118
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Additional Feature | WITH HOLD MODE |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC377 |
| Function | Standard |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Bits | 8 |
| Clock Frequency | 330MHz |
| Propagation Delay | 6 ns |
| Turn On Delay Time | 1.5 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 7.6ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Input Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74LVC377D,118 Overview
It is packaged in the way of 20-SOIC (0.295, 7.50mm Width). As part of the package Tape & Reel (TR), it is embedded. Currently, the output is configured to use Non-Inverted. This trigger uses the value Positive Edge. There is an electronic component mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis used as the supply voltage. In the operating environment, the temperature is -40°C~125°C TA. This electronic flip flop is of type D-Type. In terms of FPGAs, it belongs to the 74LVC series. Its output frequency should not exceed 330MHz. A total of 1elements are present in it. T flip flop consumes 10μA quiescent energy. Terminations are 20. This D latch belongs to the family of 74LVC377. Power is supplied from a voltage of 2.7V volts. JK flip flop input capacitance is 5pF farads. Electronic devices of this type belong to the LVC/LCX/Zfamily. Surface Mount mounts this electronic component. A total of 20pins are provided on this board. This device has the clock edge trigger type of Positive Edge. There are 8bits in this flip flop. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. It has 8lines. There is also a characteristic of WITH HOLD MODE.
74LVC377D,118 Features
Tape & Reel (TR) package
74LVC series
20 pins
8 Bits
74LVC377D,118 Applications
There are a lot of Nexperia USA Inc. 74LVC377D,118 Flip Flops applications.
- Registers
- QML qualified product
- Single Up Count-Control Line
- Patented noise
- Frequency Divider circuits
- Individual Asynchronous Resets
- Modulo – n – counter
- Set-reset capability
- Data Synchronizers
- Instrumentation
