74LVQ374SC
| Parameters | |
|---|---|
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Ports | 2 |
| Clock Frequency | 75MHz |
| Family | LVQ |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 12mA 12mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 13ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVQ |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
74LVQ374SC Overview
The flip flop is packaged in a case of 20-SOIC (0.295, 7.50mm Width). There is an embedded version in the package Tube. It is configured with Tri-State, Non-Invertedas an output. JK flip flop uses Positive Edgeas the trigger. Surface Mountis in the way of this electric part. A supply voltage of 2V~3.6V is required for operation. It is operating at -40°C~85°C TA. D-Typedescribes this flip flop. JK flip flop is a part of the 74LVQseries of FPGAs. It should not exceed 75MHzin its output frequency. In total, it contains 1 elements. As a result, it consumes 40μA quiescent current. The number of terminations is 20. Power is supplied from a voltage of 2.7V volts. A 4.5pFfarad input capacitance is provided by this T flip flop. This D flip flop belongs to the family of LVQ. 3.6Vis the maximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be above 2V. The flip flop has 2embedded ports.
74LVQ374SC Features
Tube package
74LVQ series
74LVQ374SC Applications
There are a lot of Rochester Electronics, LLC 74LVQ374SC Flip Flops applications.
- Single Up Count-Control Line
- Dynamic threshold performance
- ESD protection
- EMI reduction circuitry
- Computers
- ATE
- Communications
- Functionally equivalent to the MC10/100EL29
- Automotive
- Bounce elimination switch
