Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.154, 3.90mm Width) |
Number of Pins |
14 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74LVQ |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Type |
D-Type |
Voltage - Supply |
2V~3.6V |
Base Part Number |
74LVQ74 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Number of Circuits |
2 |
Clock Frequency |
125MHz |
Propagation Delay |
19.7 ns |
Turn On Delay Time |
8 ns |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
20μA |
Current - Output High, Low |
12mA 12mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
14ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Number of Input Lines |
4 |
Clock Edge Trigger Type |
Positive Edge |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
74LVQ74SC Overview
The flip flop is packaged in a case of 14-SOIC (0.154, 3.90mm Width). As part of the package Tube, it is embedded. In the configuration, Differentialis used as the output. The trigger it is configured with uses Positive Edge. Surface Mountis in the way of this electric part. A voltage of 2V~3.6Vis required for its operation. The operating temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. The FPGA belongs to the 74LVQ series. It should not exceed 125MHzin its output frequency. There is a consumption of 20μAof quiescent energy. The 74LVQ74 family contains this object. JK flip flop input capacitance is 4.5pF farads. There is an electronic component mounted in the way of Surface Mount. This board has 14 pins. It has a clock edge trigger type of Positive Edge. In order to achieve its superior flexibility, 2 circuits are used. This input has 4lines.
74LVQ74SC Features
Tube package
74LVQ series
14 pins
74LVQ74SC Applications
There are a lot of ON Semiconductor 74LVQ74SC Flip Flops applications.
- Frequency division
- Data storage
- Single Down Count-Control Line
- Data Synchronizers
- ESCC
- Safety Clamp
- Latch
- Balanced Propagation Delays
- Communications
- Asynchronous counter