74LVT273PW,112
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Supplier Device Package | 20-TSSOP |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVT |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 2.7V~3.6V |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 150MHz |
| Current - Quiescent (Iq) | 190μA |
| Current - Output High, Low | 32mA 64mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 5.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| RoHS Status | ROHS3 Compliant |
74LVT273PW,112 Overview
The flip flop is packaged in 20-TSSOP (0.173, 4.40mm Width). A package named Tubeincludes it. Currently, the output is configured to use Non-Inverted. It is configured with the trigger Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. Powered by a 2.7V~3.6Vvolt supply, it operates as follows. Currently, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. This type of FPGA is a part of the 74LVT series. It should not exceed 150MHzin terms of its output frequency. D latch consists of 1 elements. T flip flop consumes 190μA quiescent energy. The input capacitance of this JK flip flopis 4pF farads.
74LVT273PW,112 Features
Tube package
74LVT series
74LVT273PW,112 Applications
There are a lot of Rochester Electronics, LLC 74LVT273PW,112 Flip Flops applications.
- Buffer registers
- Modulo – n – counter
- Set-reset capability
- Synchronous counter
- Shift Registers
- Registers
- Pattern generators
- Common Clocks
- Power down protection
- Dynamic threshold performance
