74LVT574D,112
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVT |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Additional Feature | BROADSIDE VERSION OF 374 |
| Subcategory | FF/Latches |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVT574 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2.7V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Clock Frequency | 150MHz |
| Family | LVT |
| Current - Quiescent (Iq) | 190μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.064 A |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 5.9ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 5.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 6.6 ns |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74LVT574D,112 Overview
The flip flop is packaged in a case of 20-SOIC (0.295, 7.50mm Width). The package Tubecontains it. There is a Tri-State, Non-Invertedoutput configured with it. In the configuration of the trigger, Positive Edgeis used. In this case, the electronic component is mounted in the way of Surface Mount. A 2.7V~3.6Vsupply voltage is required for it to operate. Temperature is set to -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. FPGAs belonging to the 74LVTseries contain this type of chip. It should not exceed 150MHzin terms of its output frequency. D latch consists of 1 elements. There is a consumption of 190μAof quiescent energy. Terminations are 20. The object belongs to the 74LVT574 family. The power supply voltage is 3V. Input capacitance of this device is 4pF farads. In terms of electronic devices, this device belongs to the LVTfamily of devices. This device has the base part number FF/Latches. Vsup reaches its maximum value at 3.6V. Keeping the supply voltage (Vsup) above 2.7V is necessary for normal operation. In order for the device to operate, it requires 3.3V power supplies. There are 2 ports embedded in the flip flops. As an additional reference, you may refer to electronic flip flop BROADSIDE VERSION OF 374.
74LVT574D,112 Features
Tube package
74LVT series
3.3V power supplies
74LVT574D,112 Applications
There are a lot of NXP USA Inc. 74LVT574D,112 Flip Flops applications.
- Convert a momentary switch to a toggle switch
- QML qualified product
- Data storage
- Shift Registers
- Differential Individual
- Parallel data storage
- Instrumentation
- Storage registers
- Cold spare funcion
- Functionally equivalent to the MC10/100EL29
