Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-SSOP (0.209, 5.30mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
BROADSIDE VERSION OF 374 |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
BICMOS |
Voltage - Supply |
2.7V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LVT574 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2.7V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
150MHz |
Family |
LVT |
Current - Quiescent (Iq) |
190μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Output Polarity |
TRUE |
Max I(ol) |
0.032 A |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
5.9ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
5.9 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
6.6 ns |
Height Seated (Max) |
2mm |
Length |
7.2mm |
Width |
5.3mm |
RoHS Status |
ROHS3 Compliant |
74LVT574DB,118 Overview
The item is packaged in 20-SSOP (0.209, 5.30mm Width)cases. D flip flop is embedded in the Tape & Reel (TR) package. The output it is configured with uses Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A supply voltage of 2.7V~3.6V is required for operation. A temperature of -40°C~85°C TAis considered to be the operating temperature. A flip flop of this type is classified as a D-Type. The 74LVTseries comprises this type of FPGA. This D flip flop should not have a frequency greater than 150MHz. In total, it contains 1 elements. T flip flop consumes 190μA quiescent energy. A total of 20 terminations have been made. You can search similar parts based on 74LVT574. An input voltage of 3.3Vpowers the D latch. This JK flip flop has a 4pFfarad input capacitance. A device of this type belongs to the family of LVT. It is included in FF/Latches. Vsup reaches 3.6V, the maximal supply voltage. Keeping the supply voltage (Vsup) above 2.7V is necessary for normal operation. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. An electrical current of 3.3V volts is applied to it. A D flip flop with 2embedded ports is available. BROADSIDE VERSION OF 374is also one of its characteristics.
74LVT574DB,118 Features
Tape & Reel (TR) package
74LVT series
3.3V power supplies
74LVT574DB,118 Applications
There are a lot of NXP USA Inc. 74LVT574DB,118 Flip Flops applications.
- Data storage
- Data Synchronizers
- Dynamic threshold performance
- Set-reset capability
- Storage registers
- Digital electronics systems
- Buffer registers
- Guaranteed simultaneous switching noise level
- Single Down Count-Control Line
- Computers