74LVT574PW,112
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Supplier Device Package | 20-TSSOP |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVT |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 2.7V~3.6V |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 150MHz |
| Current - Quiescent (Iq) | 190μA |
| Current - Output High, Low | 32mA 64mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 5.9ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| RoHS Status | ROHS3 Compliant |
74LVT574PW,112 Overview
In the form of 20-TSSOP (0.173, 4.40mm Width), it has been packaged. There is an embedded version in the package Tube. As configured, the output uses Tri-State, Non-Inverted. The trigger configured with it uses Positive Edge. Surface Mountis occupied by this electronic component. The JK flip flop operates at a voltage of 2.7V~3.6V. In the operating environment, the temperature is -40°C~85°C TA. D-Typedescribes this flip flop. JK flip flop is a part of the 74LVTseries of FPGAs. You should not exceed 150MHzin the output frequency of the device. A total of 1elements are contained within it. This process consumes 190μA quiescents. Input capacitance of this device is 4pF farads.
74LVT574PW,112 Features
Tube package
74LVT series
74LVT574PW,112 Applications
There are a lot of Rochester Electronics, LLC 74LVT574PW,112 Flip Flops applications.
- ESD performance
- Shift Registers
- Cold spare funcion
- QML qualified product
- Clock pulse
- Synchronous counter
- ESCC
- Frequency Divider circuits
- Single Up Count-Control Line
- Reduced system switching noise
