74LVX574TTR
| Parameters | |
|---|---|
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVX |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 20 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 74LVX574 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Clock Frequency | 75MHz |
| Propagation Delay | 22 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 11 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Max Propagation Delay @ V, Max CL | 16.7ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 40000000Hz |
| Length | 6.5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74LVX574TTR Overview
It is packaged in the way of 20-TSSOP (0.173, 4.40mm Width). A package named Tape & Reel (TR)includes it. Tri-State, Non-Invertedis the output configured for it. This trigger is configured to use Positive Edge. Surface Mountis positioned in the way of this electronic part. A voltage of 2V~3.6Vis required for its operation. It is operating at -55°C~125°C TA. Logic flip flops of this type are classified as D-Type. JK flip flop belongs to the 74LVXseries of FPGAs. You should not exceed 75MHzin its output frequency. There are 1 elements in it. A total of 20terminations have been recorded. Members of the 74LVX574family make up this object. A voltage of 2.7V is used to power it. A 4pFfarad input capacitance is provided by this T flip flop. A device of this type belongs to the family of LV/LV-A/LVX/H. It is mounted in the way of Surface Mount. It is designed with 20 pins. This device has the clock edge trigger type of Positive Edge. This part is included in FF/Latches. It is designed with a number of bits of 8. Normally, the supply voltage (Vsup) should be above 2V. In order to achieve its superior flexibility, 8 circuits are used. As a result of its reliable performance, this T flip flop is suitable for TAPE AND REEL. The flip flop has 2embedded ports. It is reported that there are 3 input lines. Despite external influences, it consumes 4μAof quiescent current.
74LVX574TTR Features
Tape & Reel (TR) package
74LVX series
20 pins
8 Bits
74LVX574TTR Applications
There are a lot of STMicroelectronics 74LVX574TTR Flip Flops applications.
- Pattern generators
- Memory
- Synchronous counter
- Individual Asynchronous Resets
- Cold spare funcion
- Counters
- Count Modes
- ESCC
- Data Synchronizers
- Parallel data storage
