Parameters |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.209, 5.30mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74LVX |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
Type |
D-Type |
Terminal Finish |
MATTE TIN |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Number of Elements |
2 |
Supply Voltage-Max (Vsup) |
3.6V |
Supply Voltage-Min (Vsup) |
2V |
Clock Frequency |
85MHz |
Family |
LV/LV-A/LVX/H |
Current - Quiescent (Iq) |
2μA |
Current - Output High, Low |
4mA 4mA |
Output Polarity |
COMPLEMENTARY |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
13.2ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
fmax-Min |
80 MHz |
Width |
5.3mm |
RoHS Status |
ROHS3 Compliant |
74LVX74SJ Overview
14-SOIC (0.209, 5.30mm Width)is the way it is packaged. Package Tubeembeds it. Currently, the output is configured to use Differential. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis in the way of this electric part. Powered by a 2V~3.6Vvolt supply, it operates as follows. Temperature is set to -40°C~85°C TA. This D latch has the type D-Type. It is a type of FPGA belonging to the 74LVX series. There should be no greater frequency than 85MHzon its output. D latch consists of 2 elements. It consumes 2μA of quiescent current without being affected by external factors. There are 14 terminations,It is powered by a voltage of 2.7V . Its input capacitance is 4pFfarads. It is a member of the LV/LV-A/LVX/Hfamily of D flip flop. There is a 3.6Vmaximum supply voltage (Vsup). It is imperative that the supply voltage (Vsup) is maintained above 2Vin order to ensure normal operation.
74LVX74SJ Features
Tube package
74LVX series
74LVX74SJ Applications
There are a lot of Rochester Electronics, LLC 74LVX74SJ Flip Flops applications.
- Guaranteed simultaneous switching noise level
- Data Synchronizers
- Shift registers
- Communications
- Digital electronics systems
- Consumer
- Common Clocks
- QML qualified product
- Automotive
- Storage Registers