Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
64-TFSOP (0.240, 6.10mm Width) |
Number of Pins |
64 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74VCX |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Type |
D-Type |
Voltage - Supply |
1.2V~3.6V |
Base Part Number |
74VCX16722 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Clock Frequency |
250MHz |
Propagation Delay |
9.2 ns |
Turn On Delay Time |
1.3 ns |
Current - Quiescent (Iq) |
20μA |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
22 |
Max Propagation Delay @ V, Max CL |
3.6ns @ 3.3V, 30pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Number of Input Lines |
2 |
Clock Edge Trigger Type |
Positive Edge |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
74VCX16722MTD Overview
As a result, it is packaged as 64-TFSOP (0.240, 6.10mm Width). As part of the package Tube, it is embedded. Tri-State, Non-Invertedis the output configured for it. In the configuration of the trigger, Positive Edgeis used. It is mounted in the way of Surface Mount. It operates with a supply voltage of 1.2V~3.6V. In this case, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. It belongs to the 74VCXseries of FPGAs. In order for it to function properly, its output frequency should not exceed 250MHz. D latch consists of 1 elements. It consumes 20μA of quiescent This D latch belongs to the family of 74VCX16722. JK flip flop input capacitance is 3.5pF farads. It is mounted by the way of Surface Mount. This board has 64 pins. This device has Positive Edgeas its clock edge trigger type. Currently, there are 2 lines of input.
74VCX16722MTD Features
Tube package
74VCX series
64 pins
74VCX16722MTD Applications
There are a lot of ON Semiconductor 74VCX16722MTD Flip Flops applications.
- Cold spare funcion
- Power down protection
- Balanced 24 mA output drivers
- Circuit Design
- ESCC
- Buffer registers
- Latch
- Asynchronous counter
- ESD performance
- Supports Live Insertion