Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2016 |
Series |
74VHC |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Technology |
CMOS |
Voltage - Supply |
2V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
JESD-30 Code |
R-PDSO-G20 |
Function |
Master Reset |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Supply Voltage-Min (Vsup) |
2V |
Clock Frequency |
110MHz |
Quiescent Current |
4μA |
Family |
AHC/VHC/H/U/V |
Current - Output High, Low |
8mA 8mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
11ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
fmax-Min |
50 MHz |
Length |
6.5mm |
Width |
4.4mm |
RoHS Status |
RoHS Compliant |
74VHC273FT Overview
As a result, it is packaged as 20-TSSOP (0.173, 4.40mm Width). D flip flop is embedded in the Tape & Reel (TR) package. The output it is configured with uses Non-Inverted. In the configuration of the trigger, Positive Edgeis used. Surface Mountis in the way of this electric part. The JK flip flop operates with an input voltage of 2V~5.5V volts. A temperature of -40°C~85°C TAis used in the operation. A flip flop of this type is classified as a D-Type. It is a type of FPGA belonging to the 74VHC series. A frequency of 110MHzshould not be exceeded by its output. A total of 1elements are contained within it. It has been determined that there have been 20 terminations. A voltage of 5V is used as the power supply for this D latch. Its input capacitance is 4pF farads. An electronic device belonging to the family AHC/VHC/H/U/Vcan be found here. Surface Mount mounts this electronic component. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. The supply voltage (Vsup) should be kept above 2V for normal operation. It consumes a total of 4μA quiescent current at any given time.
74VHC273FT Features
Tape & Reel (TR) package
74VHC series
74VHC273FT Applications
There are a lot of Toshiba Semiconductor and Storage 74VHC273FT Flip Flops applications.
- Control circuits
- Single Up Count-Control Line
- Registers
- Dynamic threshold performance
- Single Down Count-Control Line
- Memory
- Synchronous counter
- Bounce elimination switch
- Modulo – n – counter
- Latch