Parameters |
Current - Output High, Low |
8mA 8mA |
Output Polarity |
COMPLEMENTARY |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
9.3ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Height Seated (Max) |
5.33mm |
RoHS Status |
ROHS3 Compliant |
Mounting Type |
Through Hole |
Package / Case |
14-DIP (0.300, 7.62mm) |
Surface Mount |
NO |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74VHC |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
14 |
Type |
D-Type |
Terminal Finish |
MATTE TIN |
Technology |
CMOS |
Voltage - Supply |
2V~5.5V |
Terminal Position |
DUAL |
Peak Reflow Temperature (Cel) |
NOT APPLICABLE |
Supply Voltage |
3.3V |
Time@Peak Reflow Temperature-Max (s) |
NOT APPLICABLE |
Function |
Set(Preset) and Reset |
Qualification Status |
COMMERCIAL |
Output Type |
Differential |
Number of Elements |
2 |
Supply Voltage-Max (Vsup) |
5.5V |
Supply Voltage-Min (Vsup) |
2V |
Clock Frequency |
115MHz |
Family |
AHC/VHC/H/U/V |
Current - Quiescent (Iq) |
2μA |
74VHC74N Overview
The package is in the form of 14-DIP (0.300, 7.62mm). D flip flop is embedded in the Tube package. T flip flop uses Differentialas the output. This trigger is configured to use Positive Edge. In this case, the electronic component is mounted in the way of Through Hole. The JK flip flop operates with an input voltage of 2V~5.5V volts. In the operating environment, the temperature is -40°C~85°C TA. This D latch has the type D-Type. This type of FPGA is a part of the 74VHC series. This D flip flop should not have a frequency greater than 115MHz. D latch consists of 2 elements. As a result, it consumes 2μA of quiescent current without being affected by external factors. A total of 14terminations have been recorded. A voltage of 3.3V is used as the power supply for this D latch. There is 4pF input capacitance for this T flip flop. Devices in the AHC/VHC/H/U/Vfamily are electronic devices. It reaches the maximum supply voltage (Vsup) at 5.5V. Normally, the supply voltage (Vsup) should be above 2V.
74VHC74N Features
Tube package
74VHC series
74VHC74N Applications
There are a lot of Rochester Electronics, LLC 74VHC74N Flip Flops applications.
- Patented noise
- Event Detectors
- QML qualified product
- Buffer registers
- Supports Live Insertion
- Communications
- EMI reduction circuitry
- Digital electronics systems
- Single Down Count-Control Line
- Test & Measurement