Parameters | |
---|---|
Factory Lead Time | 1 Week |
Lifecycle Status | PRODUCTION (Last Updated: 2 weeks ago) |
Contact Plating | Tin |
Mount | Surface Mount |
Mounting Type | Surface Mount |
Package / Case | 176-LQFP |
Number of Pins | 176 |
Operating Temperature | -40°C~85°C TA |
Packaging | Tray |
Series | Blackfin® |
JESD-609 Code | e3 |
Pbfree Code | no |
Part Status | Active |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Number of Terminations | 176 |
Type | Fixed Point |
Additional Feature | ALSO REQUIRES 3V OR 3.3V SUPPLY |
Subcategory | Microprocessors |
Technology | CMOS |
Terminal Position | QUAD |
Terminal Form | GULL WING |
Peak Reflow Temperature (Cel) | 260 |
Supply Voltage | 1.2V |
Terminal Pitch | 0.5mm |
Frequency | 400MHz |
Time@Peak Reflow Temperature-Max (s) | 40 |
Base Part Number | ADSP-BF531 |
Pin Count | 176 |
Interface | SPI, SSP, UART |
Max Supply Voltage | 3.6V |
Min Supply Voltage | 800mV |
Memory Size | 52kB |
RAM Size | 16kB |
Memory Type | ROM, SRAM |
Number of Bits | 16 |
Bit Size | 32 |
Data Bus Width | 16b |
Number of Timers/Counters | 4 |
Core Architecture | Blackfin |
Boundary Scan | YES |
Low Power Mode | YES |
Voltage - I/O | 3.30V |
Number of UART Channels | 1 |
Barrel Shifter | YES |
Internal Bus Architecture | MULTIPLE |
Non-Volatile Memory | ROM (1kB) |
Voltage - Core | 1.20V |
Height | 1.4mm |
Length | 24mm |
Width | 24mm |
Radiation Hardening | No |
REACH SVHC | No SVHC |
RoHS Status | ROHS3 Compliant |
Lead Free | Contains Lead |
The Blackfin family of products includes the ADSP-BF531SBSTZ400, which uses the Analog Devices/Intel Micro Signal Architecture (MSA). In a single instruction set architecture, black fin processors combine a dual-MAC state-of-the-art signal processing engine, the benefits of a clean, orthogonal RISC-like CPU instruction set, and SIMD multimedia capabilities.
1.8 V, 2.5 V, and 3.3 V compliant I/O
Up to 600 MHz high performance Blackfin processor
Advanced debug, trace, and performance monitoring
0.85 V to 1.30 V core VDD with on-chip voltage regulation
160-ball CSP_BGA, 169-ball PBGA, and 176-lead LQFP packages
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter
RISC-like register and instruction model for ease of programming and compiler-friendly support
Automotive
Enterprise systems
Communications equipment