CD40174BNSR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 16 |
| Weight | 200.686274mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 4000B |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 3V~18V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | CD40174 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 3V |
| Load Capacitance | 50pF |
| Number of Bits | 6 |
| Clock Frequency | 16MHz |
| Propagation Delay | 300 ns |
| Quiescent Current | 20μA |
| Turn On Delay Time | 50 ns |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 6.8mA 6.8mA |
| Max Propagation Delay @ V, Max CL | 100ns @ 15V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Input Lines | 6 |
| fmax-Min | 8 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 3500000Hz |
| Height | 2mm |
| Length | 10.3mm |
| Width | 5.3mm |
| Thickness | 1.95mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD40174BNSR Overview
16-SOIC (0.209, 5.30mm Width)is the way it is packaged. A package named Tape & Reel (TR)includes it. T flip flop uses Non-Invertedas its output configuration. This trigger is configured to use Positive Edge. The electronic part is mounted in the way of Surface Mount. Powered by a 3V~18Vvolt supply, it operates as follows. A temperature of -55°C~125°C TAis used in the operation. The type of this D latch is D-Type. JK flip flop is a part of the 4000Bseries of FPGAs. Its output frequency should not exceed 16MHz. A total of 1elements are contained within it. This process consumes 4μA quiescents. 16terminations have occurred. The CD40174family includes it. The power supply voltage is 5V. The input capacitance of this JK flip flopis 5pF farads. There is an electronic component mounted in the way of Surface Mount. The electronic flip flop is designed with pins 16. This device's clock edge trigger type is Positive Edge. The part is included in FF/Latches. The flip flop is designed with 6bits. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 3V. Due to its reliability, this T flip flop is well suited for TR. A total of 6input lines have been provided. It consumes a total of 20μA quiescent current at any given time.
CD40174BNSR Features
Tape & Reel (TR) package
4000B series
16 pins
6 Bits
CD40174BNSR Applications
There are a lot of Texas Instruments CD40174BNSR Flip Flops applications.
- Data transfer
- Cold spare funcion
- Memory
- Single Up Count-Control Line
- Consumer
- Registers
- Test & Measurement
- Matched Rise and Fall
- Single Down Count-Control Line
- Frequency Dividers
