CD40175BNSR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 16 |
| Weight | 200.686274mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 4000B |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 3V~18V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | CD40175 |
| Function | Master Reset |
| Number of Outputs | 8 |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 3V |
| Load Capacitance | 50pF |
| Number of Bits | 4 |
| Clock Frequency | 14MHz |
| Propagation Delay | 400 ns |
| Quiescent Current | 20μA |
| Turn On Delay Time | 70 ns |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 6.8mA 6.8mA |
| Max Propagation Delay @ V, Max CL | 120ns @ 15V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Power Supply Current-Max (ICC) | 0.06mA |
| Number of Input Lines | 4 |
| fmax-Min | 6.5 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 2000000Hz |
| Height | 2mm |
| Length | 10.3mm |
| Width | 5.3mm |
| Thickness | 1.95mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD40175BNSR Overview
The flip flop is packaged in 16-SOIC (0.209, 5.30mm Width). D flip flop is embedded in the Tape & Reel (TR) package. Differentialis the output configured for it. This trigger is configured to use Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. It operates with a supply voltage of 3V~18V. It is at -55°C~125°C TAdegrees Celsius that the system is operating. There is D-Type type of electronic flip flop associated with this device. JK flip flop is a part of the 4000Bseries of FPGAs. This D flip flop should not have a frequency greater than 14MHz. The element count is 1 . There is a consumption of 4μAof quiescent energy. A total of 16terminations have been recorded. The object belongs to the CD40175 family. Power is provided by a 5V supply. This JK flip flop has a 5pFfarad input capacitance. Electronic part Surface Mountis mounted in the way. 16pins are included in its design. There is a clock edge trigger type of Positive Edgeon this device. The part is included in FF/Latches. The design is based on 4bits. Normally, the supply voltage (Vsup) should be kept above 3V. This D flip flop is well suited for TR based on its reliable performance. 4input lines are available for you to choose from. This D latch consumes 20μA quiescent current at all.
CD40175BNSR Features
Tape & Reel (TR) package
4000B series
16 pins
4 Bits
CD40175BNSR Applications
There are a lot of Texas Instruments CD40175BNSR Flip Flops applications.
- Cold spare funcion
- Data storage
- Shift Registers
- ESD protection
- Asynchronous counter
- Dynamic threshold performance
- Count Modes
- Individual Asynchronous Resets
- Functionally equivalent to the MC10/100EL29
- Supports Live Insertion
