CD74AC109E
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 16-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74AC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 16 |
| Type | JK Type |
| Technology | CMOS |
| Voltage - Supply | 1.5V~5.5V |
| Terminal Position | DUAL |
| Supply Voltage | 5V |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Clock Frequency | 100MHz |
| Family | AC |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 10.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Height Seated (Max) | 5.33mm |
| RoHS Status | Non-RoHS Compliant |
CD74AC109E Overview
It is embeded in 16-DIP (0.300, 7.62mm) case. You can find it in the Tubepackage. The output it is configured with uses Differential. The trigger configured with it uses Positive Edge. The electronic part is mounted in the way of Through Hole. A voltage of 1.5V~5.5Vis required for its operation. A temperature of -55°C~125°C TAis used in the operation. It belongs to the type JK Typeof flip flops. It belongs to the 74ACseries of FPGAs. You should not exceed 100MHzin its output frequency. In total, it contains 2 elements. T flip flop consumes 4μA quiescent energy. In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. It is powered by a voltage of 5V . Its input capacitance is 10pFfarads. Electronic devices of this type belong to the ACfamily. The maximal supply voltage (Vsup) reaches 5.5V.
CD74AC109E Features
Tube package
74AC series
CD74AC109E Applications
There are a lot of Rochester Electronics, LLC CD74AC109E Flip Flops applications.
- Patented noise
- Load Control
- Power down protection
- Digital electronics systems
- Asynchronous counter
- Individual Asynchronous Resets
- ESD protection
- Communications
- Frequency Divider circuits
- High Performance Logic for test systems
