Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Number of Pins |
20 |
Weight |
500.709277mg |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tube |
Series |
74AC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Termination |
SMD/SMT |
ECCN Code |
EAR99 |
Type |
D-Type |
Subcategory |
FF/Latch |
Technology |
CMOS |
Voltage - Supply |
1.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Base Part Number |
74AC273 |
Function |
Master Reset |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3/5V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Output Current |
24mA |
Number of Bits |
8 |
Clock Frequency |
100MHz |
Propagation Delay |
169 ns |
Quiescent Current |
8μA |
Turn On Delay Time |
3.4 ns |
Family |
AC |
Logic Function |
D-Type, Flip-Flop |
Current - Output High, Low |
24mA 24mA |
Max I(ol) |
0.024 A |
Max Propagation Delay @ V, Max CL |
13.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
Clock Edge Trigger Type |
Positive Edge |
Height |
2.65mm |
Length |
12.8mm |
Width |
7.5mm |
Thickness |
2.35mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
CD74AC273M Overview
20-SOIC (0.295, 7.50mm Width)is the packaging method. You can find it in the Tubepackage. Currently, the output is configured to use Non-Inverted. It is configured with the trigger Positive Edge. Surface Mountis positioned in the way of this electronic part. With a supply voltage of 1.5V~5.5V volts, it operates. In this case, the operating temperature is -55°C~125°C TA. There is D-Type type of electronic flip flop associated with this device. JK flip flop belongs to the 74ACseries of FPGAs. Its output frequency should not exceed 100MHz Hz. In total, it contains 1 elements. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 74AC273 family contains it. It is powered from a supply voltage of 3.3V. The input capacitance of this T flip flop is 10pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. In this case, the D flip flop belongs to the ACfamily. Electronic part Surface Mountis mounted in the way. As you can see from the design, it has pins with 20. It has a clock edge trigger type of Positive Edge. There is a base part number FF/Latchfor the RS flip flops. There are 8bits in its design. The maximal supply voltage (Vsup) reaches 5.5V. Its flexibility is enhanced by 8 circuits. It operates from 3.3/5V power supplies. Its output current of 24mAallows for maximum design flexibility. It consumes 8μA current.
CD74AC273M Features
Tube package
74AC series
20 pins
8 Bits
3.3/5V power supplies
CD74AC273M Applications
There are a lot of Texas Instruments CD74AC273M Flip Flops applications.
- Single Up Count-Control Line
- Latch
- ESD protection
- Memory
- Frequency Dividers
- Buffered Clock
- Data transfer
- Divide a clock signal by 2 or 4
- Data storage
- Supports Live Insertion