Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 1 week ago) |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
20 |
Weight |
76.997305mg |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tube |
Series |
74HC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Termination |
SMD/SMT |
Type |
D-Type |
Additional Feature |
WITH HOLD MODE |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74HC377 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Power Supplies |
2/6V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Output Current |
5.2mA |
Number of Bits |
8 |
Clock Frequency |
60MHz |
Propagation Delay |
175 ns |
Quiescent Current |
8μA |
Turn On Delay Time |
14 ns |
Family |
HC/UH |
Logic Function |
D-Type, Flip-Flop |
Current - Output High, Low |
5.2mA 5.2mA |
Max I(ol) |
0.0052 A |
Max Propagation Delay @ V, Max CL |
30ns @ 6V, 50pF |
Prop. Delay@Nom-Sup |
53 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
fmax-Min |
23 MHz |
Clock Edge Trigger Type |
Positive Edge |
Height |
1.2mm |
Length |
6.5mm |
Width |
4.4mm |
Thickness |
1mm |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
CD74HC377PW Overview
20-TSSOP (0.173, 4.40mm Width)is the packaging method. There is an embedded version in the package Tube. Non-Invertedis the output configured for it. It is configured with a trigger that uses a value of Positive Edge. It is mounted in the way of Surface Mount. Powered by a 2V~6Vvolt supply, it operates as follows. It is at -55°C~125°C TAdegrees Celsius that the system is operating. This logic flip flop is classified as type D-Type. JK flip flop is a part of the 74HCseries of FPGAs. It should not exceed 60MHzin its output frequency. A total of 1elements are contained within it. There have been 20 terminations. D latch belongs to the 74HC377 family. It is powered from a supply voltage of 5V. Input capacitance of this device is 10pF farads. Devices in the HC/UHfamily are electronic devices. In this case, the electronic component is mounted in the way of Surface Mount. There are 20pins on it. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. It is included in FF/Latches. It is designed with a number of bits of 8. It reaches the maximum supply voltage (Vsup) at 6V. For normal operation, the supply voltage (Vsup) should be above 2V. The superior flexibility of this circuit is achieved by using 8 circuits. The power supply is 2/6V. Featuring the maximum design flexibility, it has an output current of 5.2mA . This D latch consumes 8μA quiescent current at all. Additionally, it is characterized by WITH HOLD MODE.
CD74HC377PW Features
Tube package
74HC series
20 pins
8 Bits
2/6V power supplies
CD74HC377PW Applications
There are a lot of Texas Instruments CD74HC377PW Flip Flops applications.
- Power down protection
- Digital electronics systems
- Memory
- Test & Measurement
- 2 – Bit synchronous counter
- Matched Rise and Fall
- Modulo – n – counter
- Shift registers
- Control circuits
- Asynchronous counter