CD74HC564E
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 20-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74HC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 20 |
| Type | D-Type |
| Additional Feature | BROADSIDE VERSION OF 534 |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Supply Voltage | 5V |
| JESD-30 Code | R-PDIP-T20 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Tri-State, Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Ports | 2 |
| Clock Frequency | 60MHz |
| Family | HC/UH |
| Current - Quiescent (Iq) | 8μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 7.8mA 7.8mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 28ns @ 6V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Propagation Delay (tpd) | 250 ns |
| RoHS Status | Non-RoHS Compliant |
CD74HC564E Overview
It is embeded in 20-DIP (0.300, 7.62mm) case. You can find it in the Tubepackage. In the configuration, Tri-State, Invertedis used as the output. It is configured with a trigger that uses a value of Positive Edge. There is an electronic component mounted in the way of Through Hole. The JK flip flop operates at a voltage of 2V~6V. -55°C~125°C TAis the operating temperature. D-Typedescribes this flip flop. In this case, it is a type of FPGA belonging to the 74HC series. In order for it to function properly, its output frequency should not exceed 60MHz. D latch consists of 1 elements. During its operation, it consumes 8μA quiescent energy. Currently, there are 20 terminations. A voltage of 5V is used as the power supply for this D latch. A 10pFfarad input capacitance is provided by this T flip flop. Devices in the HC/UHfamily are electronic devices. Vsup reaches its maximum value at 6V. A normal operating voltage (Vsup) should remain above 2V. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. It is also characterized by BROADSIDE VERSION OF 534.
CD74HC564E Features
Tube package
74HC series
CD74HC564E Applications
There are a lot of Rochester Electronics, LLC CD74HC564E Flip Flops applications.
- Common Clocks
- Balanced Propagation Delays
- CMOS Process
- Dynamic threshold performance
- Event Detectors
- Memory
- Safety Clamp
- Modulo – n – counter
- Patented noise
- Set-reset capability
