CLVC1G175MDCKREP
| Parameters | |
|---|---|
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-TSSOP, SC-88, SOT-363 |
| Number of Pins | 6 |
| Weight | 2.494758mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Base Part Number | 74LVC1G175 |
| Function | Reset |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Number of Circuits | 1 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Number of Bits | 1 |
| Clock Frequency | 175MHz |
| Propagation Delay | 8 ns |
| Quiescent Current | 10μA |
| Turn On Delay Time | 1.5 ns |
| Family | LVC/LCX/Z |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.032 A |
| Max Propagation Delay @ V, Max CL | 5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.1mm |
| Length | 2mm |
| Width | 1.25mm |
| Thickness | 900μm |
CLVC1G175MDCKREP Overview
As a result, it is packaged as 6-TSSOP, SC-88, SOT-363. The package Tape & Reel (TR)contains it. Currently, the output is configured to use Non-Inverted. In the configuration of the trigger, Positive Edgeis used. There is an electric part mounted in the way of Surface Mount. Powered by a 1.65V~5.5Vvolt supply, it operates as follows. A temperature of -55°C~125°C TAis used in the operation. A flip flop of this type is classified as a D-Type. This type of FPGA is a part of the 74LVC series. There should be no greater frequency than 175MHzon its output. The number of terminations is 6. JK flip flop belongs to 74LVC1G175 family. It is powered from a supply voltage of 1.8V. The input capacitance of this JK flip flopis 3pF farads. Devices in the LVC/LCX/Zfamily are electronic devices. Surface Mount mounts this electronic component. This board has 6 pins. It has a clock edge trigger type of Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. 1bits are used in its design. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. Due to its superior flexibility, it uses 1 circuits. In light of its reliable performance, this T flip flop is well suited for TR. The D latch operates on 3.3V volts. With a current output of 24mA , it offers maximum design flexibility. Despite external influences, it consumes 10μAof quiescent current.
CLVC1G175MDCKREP Features
Tape & Reel (TR) package
74LVC series
6 pins
1 Bits
3.3V power supplies
CLVC1G175MDCKREP Applications
There are a lot of Texas Instruments CLVC1G175MDCKREP Flip Flops applications.
- Balanced 24 mA output drivers
- Synchronous counter
- Set-reset capability
- Computers
- Buffer registers
- Divide a clock signal by 2 or 4
- Bus hold
- Safety Clamp
- Counters
- Asynchronous counter
