Parameters |
Series |
74LS |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Type |
D-Type |
Voltage - Supply |
4.75V~5.25V |
Base Part Number |
74LS174 |
Function |
Master Reset |
Output Type |
Non-Inverted |
Operating Supply Voltage |
5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Output Current |
8mA |
Clock Frequency |
30MHz |
Propagation Delay |
36 ns |
Turn On Delay Time |
30 ns |
Current - Output High, Low |
400μA 8mA |
Trigger Type |
Positive Edge |
Number of Input Lines |
6 |
Clock Edge Trigger Type |
Positive Edge |
REACH SVHC |
No SVHC |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
Mount |
Through Hole |
Mounting Type |
Through Hole |
Package / Case |
16-DIP (0.300, 7.62mm) |
Number of Pins |
16 |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tube |
DM74LS174N Overview
As a result, it is packaged as 16-DIP (0.300, 7.62mm). There is an embedded version in the package Tube. This output is configured with Non-Inverted. Positive Edgeis the trigger it is configured with. Through Holeis positioned in the way of this electronic part. The JK flip flop operates with an input voltage of 4.75V~5.25V volts. It is operating at 0°C~70°C TA. Logic flip flops of this type are classified as D-Type. It belongs to the 74LSseries of FPGAs. In order for it to function properly, its output frequency should not exceed 30MHz. The list contains 1 elements. The 74LS174family includes it. There is an electronic part mounted in the way of Through Hole. The electronic flip flop is designed with pins 16. This device has Positive Edgeas its clock edge trigger type. For high efficiency, the supply voltage should be set to 5V. With an output current of 8mA, it is possible to design the device in any way you want. It has 6lines.
DM74LS174N Features
Tube package
74LS series
16 pins
DM74LS174N Applications
There are a lot of ON Semiconductor DM74LS174N Flip Flops applications.
- Memory
- Single Up Count-Control Line
- Load Control
- Control circuits
- Parallel data storage
- High Performance Logic for test systems
- 2 – Bit synchronous counter
- Instrumentation
- ESCC
- Buffered Clock