Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
8-SOIC (0.154, 3.90mm Width) |
Number of Pins |
8 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2008 |
Series |
100EL |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
8 |
Type |
D-Type |
Additional Feature |
NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
ECL |
Voltage - Supply |
-4.2V~-5.7V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
5V |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
100EL31 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.7V |
Power Supplies |
-4.5V |
Supply Voltage-Min (Vsup) |
4.2V |
Number of Circuits |
1 |
Number of Bits |
1 |
Clock Frequency |
2.8GHz |
Propagation Delay |
590 ps |
Turn On Delay Time |
465 ps |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
32mA |
Output Characteristics |
OPEN-EMITTER |
Trigger Type |
Positive Edge |
High Level Output Current |
50mA |
Low Level Output Current |
50mA |
Power Supply Current-Max (ICC) |
37mA |
fmax-Min |
2200 MHz |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
2000000000Hz |
Length |
4.9mm |
Width |
3.9mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC100EL31DR2 Overview
The item is packaged in 8-SOIC (0.154, 3.90mm Width)cases. D flip flop is embedded in the Tape & Reel (TR) package. In the configuration, Differentialis used as the output. This trigger uses the value Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at -4.2V~-5.7Vvolts. In the operating environment, the temperature is -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. In this case, it is a type of FPGA belonging to the 100EL series. This D flip flop should not have a frequency greater than 2.8GHz. During its operation, it consumes 32mA quiescent energy. There are 8 terminations,JK flip flop belongs to 100EL31 family. A voltage of 5V provides power to the D latch. A part of the electronic system is mounted in the way of Surface Mount. As you can see from the design, it has pins with 8. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. The part you are looking for is included in FF/Latches. There are 1bits in this flip flop. Vsup reaches 5.7V, the maximal supply voltage. A normal operating voltage (Vsup) should remain above 4.2V. Due to its superior flexibility, it uses 1 circuits. As a result of its reliability, this D flip flop is ideally suited for TAPE AND REEL. It runs on -4.5Vvolts of power. Additionally, you may refer to the D latch's additional NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V. A high level output current of 50mAis set. In the low level output current setting, the current is set to 50mA.
MC100EL31DR2 Features
Tape & Reel (TR) package
100EL series
8 pins
1 Bits
-4.5V power supplies
MC100EL31DR2 Applications
There are a lot of ON Semiconductor MC100EL31DR2 Flip Flops applications.
- Control circuits
- Buffered Clock
- Common Clocks
- Set-reset capability
- Data storage
- CMOS Process
- Data Synchronizers
- ATE
- Storage Registers
- Storage registers