Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
Number of Pins |
8 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2008 |
Series |
100EL |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
8 |
Type |
D-Type |
Additional Feature |
NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
ECL |
Voltage - Supply |
-4.2V~-5.7V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
100EL51 |
Function |
Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.7V |
Power Supplies |
-4.5V |
Supply Voltage-Min (Vsup) |
4.2V |
Number of Circuits |
1 |
Number of Bits |
1 |
Clock Frequency |
2.8GHz |
Propagation Delay |
565 ps |
Turn On Delay Time |
475 ps |
Logic Function |
Flip-Flop |
Current - Quiescent (Iq) |
29mA |
Prop. Delay@Nom-Sup |
0.62 ns |
Trigger Type |
Positive, Negative |
High Level Output Current |
50mA |
Low Level Output Current |
50mA |
Power Supply Current-Max (ICC) |
36mA |
fmax-Min |
2200 MHz |
Clock Edge Trigger Type |
Positive Edge |
Length |
3mm |
Width |
3mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC100EL51DT Overview
The flip flop is packaged in 8-TSSOP, 8-MSOP (0.118, 3.00mm Width). You can find it in the Tubepackage. The output it is configured with uses Differential. The trigger configured with it uses Positive, Negative. Surface Mountmounts this electrical part. A voltage of -4.2V~-5.7Vis required for its operation. A temperature of -40°C~85°C TAis used in the operation. This D latch has the type D-Type. It belongs to the 100ELseries of FPGAs. It should not exceed 2.8GHzin its output frequency. There is 29mA quiescent consumption. There are 8 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The object belongs to the 100EL51 family. The power supply voltage is 5V. This electronic part is mounted in the way of Surface Mount. As you can see from the design, it has pins with 8. A Positive Edgeclock edge trigger is used in this device. There is a FF/Latchesbase part number assigned to the RS flip flops. The design is based on 1bits. It reaches 5.7Vwhen the supply voltage is maximal (Vsup). A normal operating voltage (Vsup) should remain above 4.2V. Using 1 circuits, it is highly flexible. In view of its reliability, this D flip flop is a good fit for RAIL. The power supply is -4.5V. In addition, NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7Vis a characteristic of it. 50mAis the output current at high level. There is no low level output current set at 50mA.
MC100EL51DT Features
Tube package
100EL series
8 pins
1 Bits
-4.5V power supplies
MC100EL51DT Applications
There are a lot of ON Semiconductor MC100EL51DT Flip Flops applications.
- Supports Live Insertion
- Memory
- Functionally equivalent to the MC10/100EL29
- Set-reset capability
- Test & Measurement
- Divide a clock signal by 2 or 4
- Matched Rise and Fall
- ESD performance
- Computers
- Bus hold