MC100EP35DT
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 100EP |
| JESD-609 Code | e0 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 8 |
| Type | JK Type |
| Terminal Finish | TIN LEAD |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| JESD-30 Code | S-PDSO-G8 |
| Function | Reset |
| Qualification Status | COMMERCIAL |
| Output Type | Differential |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Bits | 2 |
| Clock Frequency | 3GHz |
| Current - Quiescent (Iq) | 50mA |
| Output Polarity | COMPLEMENTARY |
| Trigger Type | Positive Edge |
| Propagation Delay (tpd) | 0.49 ns |
| Length | 3mm |
| Width | 3mm |
| RoHS Status | Non-RoHS Compliant |
MC100EP35DT Overview
It is packaged in the way of 8-TSSOP, 8-MSOP (0.118, 3.00mm Width). D flip flop is embedded in the Tube package. Differentialis the output configured for it. It is configured with the trigger Positive Edge. Surface Mountis positioned in the way of this electronic part. It operates with a supply voltage of -3V~-5.5V. In this case, the operating temperature is -40°C~85°C TA. There is JK Type type of electronic flip flop associated with this device. In FPGA terms, D flip flop is a type of 100EPseries FPGA. You should not exceed 3GHzin the output frequency of the device. The list contains 1 elements. As a result, it consumes 50mA of quiescent current without being affected by external factors. 8terminations have occurred. A voltage of 3.3V provides power to the D latch. An electronic part with 2bits has been designed. It reaches the maximum supply voltage (Vsup) at 5.5V. It is imperative that the supply voltage (Vsup) is maintained above 3Vin order to ensure normal operation. Additionally, it is characterized by NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V.
MC100EP35DT Features
Tube package
100EP series
2 Bits
MC100EP35DT Applications
There are a lot of Rochester Electronics, LLC MC100EP35DT Flip Flops applications.
- Functionally equivalent to the MC10/100EL29
- Buffer registers
- Shift Registers
- Data storage
- ESD protection
- Bus hold
- Safety Clamp
- Load Control
- Latch-up performance
- Clock pulse
